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#!/bin/sh
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[ -e /lib/firmware/$FIRMWARE ] && exit 0
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. /lib/functions/caldata.sh
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. /lib/functions/k2t.sh
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board=$(board_name)
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case "$FIRMWARE" in
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"ath10k/cal-pci-0000:00:00.0.bin")
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case $board in
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comfast,cf-wr650ac-v1|\
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comfast,cf-wr650ac-v2|\
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ath79: add support for Devolo Magic 2 WIFI
This patch support Devolo Magic 2 WIFI, board devolo_dlan2-2400-ac.
This device is a plc wifi AC2400 router/extender with 2 Ethernet
ports, has a G.hn PLC and uses LCMP protocol from Home Grid Forum.
Hardware:
SoC: AR9344
CPU: 560 MHz
Flash: 16 MiB (W25Q128JVSIQ)
RAM: 128 MiB DDR2
Ethernet: 2xLAN 10/100/1000
PLC: 88LX5152 (MaxLinear G.hn)
PLC Flash: W25Q32JVSSIQ
PLC Uplink: 1Gbps MIMO
PLC Link: RGMII 1Gbps (WAN)
WiFi: Atheros AR9340 2.4GHz 802.11bgn
Atheros AR9882-BR4A 5GHz 802.11ac
Switch: QCA8337, Port0:CPU, Port2:PLC, Port3:LAN1, Port4:LAN2
Button: 3x Buttons (Reset, wifi and plc)
LED: 3x Leds (wifi, plc white, plc red)
GPIO Switch: 11-PLC Pairing (Active Low)
13-PLC Enable
21-WLAN power
MACs Details verified with the stock firmware:
Radio1: 2.4 GHz &wmac *:4c Art location: 0x1002
Radio0: 5.0 GHz &pcie *:4d Art location: 0x5006
Ethernet ðernet *:4e = 2.4 GHz + 2
PLC uplink --- *:4f = 2.4 GHz + 3
Label MAC address is from PLC uplink
OEM SSID: echo devolo-$(grep SerialNumber /dev/mtd1 | grep -o ...$)
OEM WiFi password: grep DlanSecurityID /dev/mtd1|tr -d -|cut -d'=' -f 2
Recommendations: Configure and link your PLC with OEM firmware
BEFORE you flash the device. PLC configuration/link should
remain in different memory and should work straight forward
after flashing.
Restrictions: PLC link detection to trigger plc red led is not
available. PLC G.hn chip is not compatible with open-plc-tools,
it uses LCMP protocol with AES-128 and requires different
software.
Notes: Pairing should be possible with gpio switch. Default
configuration will trigger wifi led with 2.4Ghz wifi traffic
and plc white led with wan traffic.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.100
2. Download the sysupgrade image and rename it to uploadfile
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Allow 1-2 minutes for the first boot.
Signed-off-by: Manuel Giganto <mgigantoregistros@gmail.com>
5 years ago
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devolo,magic-2-wifi|\
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ubnt,unifiac-lite|\
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ubnt,unifiac-lr|\
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ubnt,unifiac-mesh|\
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ubnt,unifiac-mesh-pro|\
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ubnt,lap-120|\
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ubnt,litebeam-ac-gen2|\
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ubnt,nanobeam-ac|\
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ubnt,nanostation-ac|\
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ubnt,nanostation-ac-loco|\
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ubnt,unifiac-pro|\
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yuncore,a770)
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caldata_extract "art" 0x5000 0x844
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;;
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devolo,dvl1200e|\
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devolo,dvl1200i|\
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devolo,dvl1750c|\
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devolo,dvl1750e|\
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devolo,dvl1750i|\
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devolo,dvl1750x)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) -1)
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;;
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dlink,dir-859-a1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(mtd_get_mac_ascii devdata "wlan5mac")
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;;
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elecom,wrc-1750ghbk2-i)
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caldata_extract "art" 0x5000 0x844
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;;
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engenius,ecb1750)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(mtd_get_mac_ascii u-boot-env athaddr)
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;;
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ath79: add suport for EnGenius EPG5000
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
5 years ago
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engenius,epg5000|\
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iodata,wn-ac1167dgr|\
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ath79: add support for Sitecom WLR-7100
Sitecom WLR-7100 v1 002 (marketed as X7 AC1200) is a dual band wireless
router.
Specification
SoC: Atheros AR1022
RAM: 64 MB DDR2
Flash: 8 MB SPI NOR
WIFI: 2.4 GHz 2T2R integrated
5 GHz 2T2R QCA9882 integrated (connected to PCIe lane)
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled, 5x switch
Buttons: 2x GPIO controlled
UART: row of 4 unpopulated holes near USB port, starting count from
white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Toolbox > Firmware,
4. Browse for OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Known issues
5GHz LED doesn't work
Additional information
When TX line on UART is connected, and board is switched on from power
off state, the DDR memory training may fail.
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: SitecomSenao
useful for creating backup of original firmware.
There is also another revision of this device (v1 001), which may or may
not work with introduced images.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
5 years ago
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iodata,wn-ac1600dgr2|\
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sitecom,wlr-7100)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
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ath79: add suport for EnGenius EPG5000
EnGenius EPG5000 (v1.0.0, marketed as IoT Gateway) is a dual band
wireless router.
Specification
SoC: Qualcomm Atheros QCA9558
RAM: 256 MB DDR2
Flash: 16 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9880 Mini PCIe card
Ethernet: 5x 10/100/1000 Mbps QCA8337N
USB: 1x 2.0
LEDS: 4x GPIO controlled
Buttons: 2x GPIO controlled
UART: 4 pin header, starting count from white triangle on PCB
1. VCC 3.3V, 2. GND, 3. TX, 4. RX
baud: 115200, parity: none, flow control: none
Installation
1. Connect to one of LAN (yellow) ethernet ports,
2. Open router configuration interface,
3. Go to Tools > Firmware,
4. Select OpenWrt factory image with dlf extension and hit Apply,
5. Wait few minutes, after the Power LED will stop blinking, the router
is ready for configuration.
Alternative installation
1. Prepare TFTP server with OpenWrt sysupgrade image,
2. Connect to one of LAN (yellow) ethernet ports,
3. Connect to UART port (leaving out VCC pin!),
4. Power on router,
5. When asked to enter a number 1 or 3 hit 2, this will select flashing
image from TFTP server option,
6. You'll be prompted to enter TFTP server ip (default is 192.168.99.8),
then router ip (default is 192.168.99.9) and for last, image name
downloaded from TFTP server (default is uImageESR1200_1750),
7. After providing all information U-Boot will start flashing the image,
You can observe progress on console, it'll take few minutes and when
the Power LED will stop blinking, router is ready for configuration.
Additional information
If connected to UART, when prompted for number on boot, one can enter
number 4 to open bootloader (U-Boot) command line.
OEM firmware shell password is: aigo3d0a0tdagr
useful for creating backup of original firmware.
When doing upgrade from OpenWrt ar71xx image, it is recomended to not keep
the old configuration.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
5 years ago
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;;
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engenius,ews511ap)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1)
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;;
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ath79: GL-AR750S: provide NAND support; increase kernel to 4 MB
The GL.iNet GL-AR750S has been supported by the ar71xx and ath79
platforms with access to its 16 MB NOR flash, but not its 128 MB
SPI NAND flash.
This commit provides support for the NAND through the upstream
SPI-NAND framework.
At this time, the OEM U-Boot appears to only support loading the
kernel from NOR. This configuration is preserved as this time,
with the glinet,gl-ar750s-nand name reserved for a potential,
future, NAND-only boot.
The family of GL-AR750S devices on the ath79 platform now includes:
* glinet,gl-ar750m-nor-nand "nand" target
* glinet,gl-ar750m-nor "nand" target (NAND-aware)
NB: This commit increases the kernel size from 2 MB to 4 MB
"Force-less" sysupgrade is presently supported from the current
versions of following NOR-based firmwre images to the version of
glinet,gl-ar750s-nor firmware produced by this commit:
* glinet,gl-ar750s -- OpenWrt 19.07 ar71xx
* glinet,gl-ar750s -- OpenWrt 19.07 ath79
Users who have sucessfully upgraded to glinet,gl-ar750m-nor may then
flash glinet,gl-ar750m-nor-nand with sysupgrade to transtion to the
NAND-based variant.
Other upgrades to these images, including directly to the NAND-based
glinet,gl-ar750s-nor-nand firmware, can be accomplished through U-Boot.
NB: See "ath79: restrict GL-AR750S kernel build-size to 2 MB" which
enables flashing of NAND factory.img with the current GL-iNet U-Boot,
"U-Boot 1.1.4-gcf378d80-dirty (Aug 16 2018 - 07:51:15)"
The GL-AR750S OEM U-Boot allows upload and flashing of either NOR
firmware (sysupgrade.bin) or NAND firmware (factory.img) through its
HTTP-based GUI. Serial connectivity is not required.
The glinet,gl-ar750s-nor and glinet,gl-ar750s-nor-nand images
generated after this commit flash each other directly.
This commit changes the control of the USB VBUS to gpio-hog from
regulator-fixed introduced by commit 0f6b944c92. This reduces the
compressed kernel size by ~14 kB, with no apparent loss of
functionality. No other ath79-nand boards are using regulator-fixed
at this time.
Note: mtd_get_mac_binary art 0x5006 does not return the proper MAC
and the GL.iNet source indicates that only the 0x0 offset is valid
The ar71xx targets are unmodified.
Cc: Alexander Wördekemper <alexwoerde@web.de>
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
5 years ago
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glinet,gl-ar750)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +1)
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;;
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glinet,gl-x750)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +2)
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;;
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nec,wg800hp)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(mtd_get_mac_text board_data 0x880)
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;;
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ocedo,koala|\
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ocedo,ursus)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(mtd_get_mac_binary art 0xc)
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;;
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openmesh,om5p-ac-v2)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +16)
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;;
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qihoo,c301)
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caldata_extract "radiocfg" 0x5000 0x844
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ath10k_patch_mac $(mtd_get_mac_ascii devdata wlan5mac)
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;;
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tplink,archer-a7-v5|\
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tplink,archer-c2-v3|\
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tplink,archer-c7-v4|\
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tplink,archer-c7-v5|\
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tplink,archer-c25-v1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) -1)
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;;
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tplink,archer-c5-v1|\
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tplink,archer-c7-v2)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary u-boot 0x1fc00) -1)
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;;
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tplink,archer-d50-v1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary romfile 0xf100) +2)
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;;
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tplink,re350k-v1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary config 0x10008) +2)
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;;
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tplink,re355-v1|\
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tplink,re450-v1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
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;;
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tplink,re450-v2)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) +1)
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;;
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ath79: add support for TP-Link TL-WR902AC v1
TP-Link TL-WR902AC v1 is a pocket-size, dual-band (AC750), successor of
TL-MR3020 (both devices use very similar enclosure, in same size). New
device is based on Qualcomm QCA9531 v2 + QCA9887. FCC ID: TE7WR902AC.
Specification:
- 650/391/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps Ethernet
- 1x USB 2.0 (GPIO-controlled power)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz (QCA9531)
- 1T1R 5 GHz (QCA9887)
- 5x LED (GPIO-controlled), 2x button, 1x 3-pos switch
- UART pads on PCB (TP1 -> TX, TP2 -> RX, TP3 -> GND, TP4 -> 3V3, jumper
resitors are missing on TX/RX lines)
- 1x micro USB (for power only)
Flash instructions:
Use "factory" image under vendor GUI.
Recovery instructions:
This device contains tftp recovery mode inside U-Boot. You can use it to
flash OpenWrt (use "factory" image) or vendor firmware.
1. Configure PC with static IP 192.168.0.66/24 and tftp server.
2. Rename "openwrt-ath79-generic-tplink_tl-wr902ac-v1-squashfs-factory.bin"
to "wr902acv1_un_tp_recovery.bin" and place it in tftp server dir.
3. Connect PC with LAN port, press the reset button, power up the router
and keep button pressed until WPS LED lights up.
4. Router will download file from server, write it to flash and reboot.
MAC Address summary:
- wlan1 (2.4GHz Wi-Fi): Label MAC
- wlan0 (5GHz Wi-Fi): Offset -1 from label
- eth0 (Wired): Offset +1 from label
Root access over serial line in vendor firmware: root/sohoadmin.
Based on support in ar71xx target by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
[remove size-cells from gpio-export]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
5 years ago
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tplink,tl-wr902ac-v1)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary tplink 0x8) -1)
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;;
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esac
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;;
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"ath10k/cal-pci-0000:01:00.0.bin")
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case $board in
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sitecom,wlr-8100)
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caldata_extract "art" 0x5000 0x844
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ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
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;;
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esac
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;;
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"ath10k/pre-cal-pci-0000:00:00.0.bin")
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|
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case $board in
|
ath79: add support for COMFAST CF-E313AC
This patch adds support for the COMFAST CF-E313AC, an outdoor wireless
CPE with two Ethernet ports and a 802.11ac radio.
Specifications:
- QCA9531 SoC
- 650/400/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps WAN Ethernet, 48V PoE-in
- 1x 10/100 Mbps LAN Ethernet, pass-through 48V PoE-out
- 1x manual pass-through PoE switch
- 64 MB RAM (DDR2)
- 16 MB FLASH
- QCA9886 2T2R 5 GHz 802.11ac, 23 dBm
- 12 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1)
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while the WAN LED flashes, until it starts flashing faster.
Once in failsafe mode, perform a factory reset as usual.
Alternatively, the U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for >10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Note:
Four MAC addresses are stored in the "art" partition (read-only):
- 0x0000: 40:A5:EF:AA:AA:A0
- 0x0006: 40:A5:EF:AA:AA:A2
- 0x1002: 40:A5:EF:AA:AA:A1
- 0x5006: 40:A5:EF:AA.AA:A3 (inside the 5 GHz calibration data)
The stock firmware assigns MAC addresses to physical and virtual
interfaces in a very particular way:
- eth0 corresponds to the physical Ethernet port labeled as WAN
- eth1 corresponds to the physical Ethernet port labeled as LAN
- eth0 belongs to the bridge interface br-wan
- eth1 belongs to the bridge interface br-lan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-wan is forced to use the MAC from 0x1002 (*:A1)
- br-lan is forced to use the MAC from 0x0 (*:A0)
- radio0 uses the calibration data from 0x5000 (which contains
a valid MAC address, *:A3). However, it is overwritten by the
one at 0x6 (*:A2)
This commit preserves the LAN/WAN roles of the physical Ethernet
ports (as labeled on the router) and the MAC addresses they expose
by default (i.e., *:A0 on LAN, *:A1 on WAN), but swaps the position
of the eth0/eth1 compared to the stock firmware:
- eth0 corresponds to the physical Ethernet port labeled as LAN
- eth1 corresponds to the physical Ethernet port labeled as WAN
- eth0 belongs to the bridge interface br-lan
- eth1 is the interface at @wan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-lan inherits the MAC from eth0 (*:A0)
- @wan inherits the MAC from eth1 (*:A1)
- radio0's MAC is overwritten to the one at 0x6
This way, eth0/eth1's positions differ from the stock firmware, but
the weird MAC ressignations in br-lan/br-wan are avoided while the
external behaviour of the router is maintained. Additionally, WAN
port is connected to the PHY gmac, allowing to monitor the link
status (e.g., to restart DHCP negotiation when plugging a cable).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
5 years ago
|
|
|
comfast,cf-e313ac)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(mtd_get_mac_binary art 0x6)
|
ath79: add support for COMFAST CF-E313AC
This patch adds support for the COMFAST CF-E313AC, an outdoor wireless
CPE with two Ethernet ports and a 802.11ac radio.
Specifications:
- QCA9531 SoC
- 650/400/216 MHz (CPU/DDR/AHB)
- 1x 10/100 Mbps WAN Ethernet, 48V PoE-in
- 1x 10/100 Mbps LAN Ethernet, pass-through 48V PoE-out
- 1x manual pass-through PoE switch
- 64 MB RAM (DDR2)
- 16 MB FLASH
- QCA9886 2T2R 5 GHz 802.11ac, 23 dBm
- 12 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1)
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new one, so a factory reset will be
needed. To do so, once the new firmware is flashed, enter into failsafe
mode by pressing the reset button several times during the boot
process, while the WAN LED flashes, until it starts flashing faster.
Once in failsafe mode, perform a factory reset as usual.
Alternatively, the U-boot bootloader contains a recovery HTTP server
to upload the firmware. Push the reset button while powering the
device on and keep it pressed for >10 seconds. The device's LEDs will
blink several times and the recovery page will be at
http://192.168.1.1; use it to upload the sysupgrade image.
Note:
Four MAC addresses are stored in the "art" partition (read-only):
- 0x0000: 40:A5:EF:AA:AA:A0
- 0x0006: 40:A5:EF:AA:AA:A2
- 0x1002: 40:A5:EF:AA:AA:A1
- 0x5006: 40:A5:EF:AA.AA:A3 (inside the 5 GHz calibration data)
The stock firmware assigns MAC addresses to physical and virtual
interfaces in a very particular way:
- eth0 corresponds to the physical Ethernet port labeled as WAN
- eth1 corresponds to the physical Ethernet port labeled as LAN
- eth0 belongs to the bridge interface br-wan
- eth1 belongs to the bridge interface br-lan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-wan is forced to use the MAC from 0x1002 (*:A1)
- br-lan is forced to use the MAC from 0x0 (*:A0)
- radio0 uses the calibration data from 0x5000 (which contains
a valid MAC address, *:A3). However, it is overwritten by the
one at 0x6 (*:A2)
This commit preserves the LAN/WAN roles of the physical Ethernet
ports (as labeled on the router) and the MAC addresses they expose
by default (i.e., *:A0 on LAN, *:A1 on WAN), but swaps the position
of the eth0/eth1 compared to the stock firmware:
- eth0 corresponds to the physical Ethernet port labeled as LAN
- eth1 corresponds to the physical Ethernet port labeled as WAN
- eth0 belongs to the bridge interface br-lan
- eth1 is the interface at @wan
- eth0 is assigned the MAC from 0x0 (*:A0)
- eth1 is assigned the MAC from 0x1002 (*:A1)
- br-lan inherits the MAC from eth0 (*:A0)
- @wan inherits the MAC from eth1 (*:A1)
- radio0's MAC is overwritten to the one at 0x6
This way, eth0/eth1's positions differ from the stock firmware, but
the weird MAC ressignations in br-lan/br-wan are avoided while the
external behaviour of the router is maintained. Additionally, WAN
port is connected to the PHY gmac, allowing to monitor the link
status (e.g., to restart DHCP negotiation when plugging a cable).
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
5 years ago
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
rm /lib/firmware/ath10k/QCA9888/hw2.0/board-2.bin
|
|
|
|
|
;;
|
ath79: add support for COMFAST CF-E560AC
This commit adds support for the COMFAST CF-E560AC, an ap143 based
in-wall access point.
Specifications:
- SoC: Qualcomm Atheros QCA9531
- RAM: 128 MB DDR2 (Winbond W971GG6SB-25)
- Storage: 16 MB NOR (Winbond 25Q128JVSO)
- WAN: 1x 10/100 PoE ethernet (48v)
- LAN: 4x 10/100 ethernet
- WLAN1: QCA9531 - 802.11b/g/n - 2x SKY85303-21 FEM
- WLAN2: QCA9886 - 802.11ac/n/a - 2x SKY85735-11 FEM
- USB: one external USB2.0 port
- UART: 3.3v, 2.54mm headers already populated on board
- LED: 7x external
- Button: 1x external
- Boot: U-Boot 1.1.4 (pepe2k/u-boot_mod)
MAC addressing:
- stock
LAN *:40 (label)
WAN *:41
5G *:42
2.4G *:4a
- flash (art partition)
0x0 *:40 (label)
0x6 *:42
0x1002 *:41
0x5006 *:43
This device contains valid MAC addresses in art 0x0, 0x6, 0x1002 and
0x5006, however the vendor firmware only reads from art:0x0 for the LAN
interface and then increments in 02_network. They also jump 8 addresses
for the second wifi interface (2.4 GHz). This behavior has been duplicated
in the DTS and ath10k hotplug to align addresses with the vendor firmware
v2.6.0.
Recovery instructions:
This device contains built-in u-boot tftp recovery.
1. Configure PC with static IP 192.168.1.10/24 and tftp server.
2. Place desired image at /firmware_auto.bin at tftp root.
3. Connect device to PC, and power on.
4. Device will fetch flash from tftp, flash and reboot into new image.
Signed-off-by: August Huber <auh@google.com>
[move jtag_disable_pins, remove unnecessary statuses in DTS, remove
duplicate entry in 11-ath10k-caldata, remove hub_port0 label in DTS]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
4 years ago
|
|
|
comfast,cf-e560ac)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) +2)
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
rm /lib/firmware/ath10k/QCA9888/hw2.0/board-2.bin
|
|
|
|
|
;;
|
|
|
|
|
dlink,dir-842-c1|\
|
|
|
|
|
dlink,dir-842-c2|\
|
|
|
|
|
dlink,dir-842-c3|\
|
|
|
|
|
nec,wg1200cr)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(mtd_get_mac_ascii devdata wlan5mac)
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for Netgear EX6400 and EX7300
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
6 years ago
|
|
|
netgear,ex6400|\
|
|
|
|
|
netgear,ex7300)
|
|
|
|
|
caldata_extract "caldata" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(mtd_get_mac_binary caldata 0xc)
|
ath79: add support for Netgear EX6400 and EX7300
This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
6 years ago
|
|
|
;;
|
|
|
|
|
phicomm,k2t)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(k2t_get_mac "5g_mac")
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for Archer C58/C59 v1
This commit adds support for the Archer C58 v1 and C59 v1, previously
supported in the ar71xx target.
CPU: Qualcomm QCA9561
RAM: 64M (C58) / 128M (C59)
FLASH: 8M (C58) / 16M (C59)
WiFi: QCA9561 bgn 3x3:3
QCA9888 nac 2x2:2
LED: Power, WiFi 2.4, WiFi 5, WAN green, WAN amber, LAN, WPS
Only C59: USB
BTN: WPS, WiFi, Reset
Installation
------------
Via Web-UI:
Update factory image via Web-UI.
Via TFTP:
Rename factory image to "tp_recovery.bin" and place it in the root-dir
of your tftp server. Configure to listen on 192.168.0.66. Power up the
router while holding down the reset-button. The router will flash itself
and reboot.
Note: For TFTP, you might need a switch between router and computer, as
link establishment might take to long.
Signed-off-by: David Bauer <mail@david-bauer.net>
6 years ago
|
|
|
tplink,archer-c58-v1|\
|
|
|
|
|
tplink,archer-c59-v1|\
|
|
|
|
|
tplink,archer-c59-v2|\
|
|
|
|
|
tplink,archer-c60-v1|\
|
|
|
|
|
tplink,archer-c60-v2|\
|
ath79: add support for TP-Link Archer C6 v2 (US) and A6 (US/TW)
This patch is based on #1689 and adds support for TP-Link Archer
C6 v2 (US) and A6 (US/TW).
The hardware is the same as EU and RU variant, except for GPIOs
(LEDS/Buttons), flash(chip/partitions) and UART being available
on the board.
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q127CS1G (16MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: 115200, 8n1 (header available on board)
Known issues:
- Wireless: 5GHz is known to have lower RSSI signal, it affects speed and range.
Flash instructions:
Upload openwrt-ath79-generic-tplink_archer-c6-v2-us-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherA6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the
reset button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
Flash partitioning: I've followed #1689 for defining the partition layout
for this patch. The partition named as "tplink" @ 0xfd0000 is marked
as read only as it is where some config for stock firmware are stored.
On stock firmware those stock partitions starts at 0xfd9400 however
I had not been able to make it functional starting on the same address as
on stock fw, so it has been partitioned following #1689 and not the stock
partition layout for this specific partition. Due to that firmware/rootfs
partition lenght is 0xf80000 and not 0xf89400 as stock.
According to the GPL code, the EU/RU/JP variant does have different GPIO pins
assignment to LEDs and buttons, also the flash memory layout is different.
GPL Source Code: https://static.tp-link.com/resources/gpl/gpl-A6v2_us.tar.gz
Signed-off-by: Anderson Vulczak <andi@andi.com.br>
[wrap commit message, remove soft_ver change for C6 v2 EU, move LED aliases
to DTS files, remove dts-v1 in DTSI, node/property reorder in DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
5 years ago
|
|
|
tplink,archer-c6-v2|\
|
|
|
|
|
tplink,archer-c6-v2-us)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary mac 0x8) -1)
|
ath79: add support for Archer C58/C59 v1
This commit adds support for the Archer C58 v1 and C59 v1, previously
supported in the ar71xx target.
CPU: Qualcomm QCA9561
RAM: 64M (C58) / 128M (C59)
FLASH: 8M (C58) / 16M (C59)
WiFi: QCA9561 bgn 3x3:3
QCA9888 nac 2x2:2
LED: Power, WiFi 2.4, WiFi 5, WAN green, WAN amber, LAN, WPS
Only C59: USB
BTN: WPS, WiFi, Reset
Installation
------------
Via Web-UI:
Update factory image via Web-UI.
Via TFTP:
Rename factory image to "tp_recovery.bin" and place it in the root-dir
of your tftp server. Configure to listen on 192.168.0.66. Power up the
router while holding down the reset-button. The router will flash itself
and reboot.
Note: For TFTP, you might need a switch between router and computer, as
link establishment might take to long.
Signed-off-by: David Bauer <mail@david-bauer.net>
6 years ago
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
ath79: add support for YunCore XD4200 and A782
YunCore XD4200 ('XD4200_W6.0' marking on PCB) is Qualcomm/Atheros based
(QCA9563, QCA9886, QCA8334) dual-band, Wave-2 AC1200 ceiling AP with PoE
(802.3at) support. A782 model ('T750_V5.1' marking on PCB) is a smaller
version of the XD4200, with similar specification but lower TX power.
Specification:
- QCA9563 (775 MHz)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 2x 10/100/1000 Mbps Ethernet (QCA8334), with 802.3at PoE support (WAN)
- Wi-Fi 2.4 GHz:
- XD4200: 2T2R (QCA9563), with ext. PA (SKY65174-21) and LNA
- A782: 2T2R (QCA9563), with ext. FEM (SKY85329-11)
- Wi-Fi 5 GHz:
- XD4200: 2T2R (QCA9886), with ext. FEM (SKY85728-11)
- A782: 2T2R (QCA9886), with ext. FEM (SKY85735-11)
- LEDs:
- XD4200: 5x (2x driven by SOC, 1x driven by AC radio, 2x Ethernet)
- A782: 3x (1x RGB, driven by SOC and radio, 2x Ethernet)
- 1x button (reset)
- 1x UART (4-pin, 2.54 mm pitch) header on PCB
- 1x DC jack (12 V)
Flash instructions:
If your device comes with generic QSDK based firmware, you can login
over telnet (login: root, empty password, default IP: 192.168.188.253),
issue first (important!) 'fw_setenv' command and then perform regular
upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download
image to the device, SSH server is not available):
fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000"
sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin
In case your device runs firmware with YunCore custom GUI, you can use
U-Boot recovery mode:
1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with
'tftp' image renamed to 'upgrade.bin'
2. Power the device with reset button pressed and release it after 5-7
seconds, recovery mode should start downloading image from server
(unfortunately, there is no visible indication that recovery got
enabled - in case of problems check TFTP server logs)
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
5 years ago
|
|
|
yuncore,a782|\
|
|
|
|
|
yuncore,xd4200)
|
|
|
|
|
caldata_extract "art" 0x5000 0x2f20
|
|
|
|
|
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
|
|
|
|
|
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
|
|
|
|
|
;;
|
|
|
|
|
esac
|
|
|
|
|
;;
|
|
|
|
|
*)
|
|
|
|
|
exit 1
|
|
|
|
|
;;
|
|
|
|
|
esac
|
