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1134 lines
36 KiB
C
1134 lines
36 KiB
C
/******************************************************************************
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**
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** FILE NAME : ifxmips_async_aes.c
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** PROJECT : IFX UEIP
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** MODULES : DEU Module
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**
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** DATE : October 11, 2010
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** AUTHOR : Mohammad Firdaus
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** DESCRIPTION : Data Encryption Unit Driver for AES Algorithm
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** COPYRIGHT : Copyright (c) 2010
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** Infineon Technologies AG
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** Am Campeon 1-12, 85579 Neubiberg, Germany
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**
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** This program is free software; you can redistribute it and/or modify
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** it under the terms of the GNU General Public License as published by
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** the Free Software Foundation; either version 2 of the License, or
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** (at your option) any later version.
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**
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** HISTORY
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** $Date $Author $Comment
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** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
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** 11, Oct 2010 Mohammad Firdaus Kernel Port incl. Async. Ablkcipher mode
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** 21,March 2011 Mohammad Firdaus Changes for Kernel 2.6.32 and IPSec integration
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*******************************************************************************/
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/*!
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\defgroup IFX_DEU IFX_DEU_DRIVERS
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\ingroup API
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\brief ifx DEU driver module
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*/
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/*!
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\file ifxmips_async_aes.c
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\ingroup IFX_DEU
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\brief AES Encryption Driver main file
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*/
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/*!
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\defgroup IFX_AES_FUNCTIONS IFX_AES_FUNCTIONS
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\ingroup IFX_DEU
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\brief IFX AES driver Functions
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*/
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#include <linux/wait.h>
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#include <linux/crypto.h>
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#include <linux/kernel.h>
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#include <linux/kthread.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <crypto/ctr.h>
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#include <crypto/scatterwalk.h>
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#include <asm/ifx/ifx_regs.h>
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#include <asm/ifx/ifx_types.h>
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#include <asm/ifx/common_routines.h>
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#include <asm/ifx/irq.h>
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#include <asm/ifx/ifx_pmu.h>
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#include <asm/ifx/ifx_gpio.h>
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#include <asm/kmap_types.h>
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#include "ifxmips_deu.h"
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#if defined(CONFIG_DANUBE)
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#include "ifxmips_deu_danube.h"
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extern int ifx_danube_pre_1_4;
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#elif defined(CONFIG_AR9)
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#include "ifxmips_deu_ar9.h"
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#elif defined(CONFIG_VR9) || defined(CONFIG_AR10)
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#include "ifxmips_deu_vr9.h"
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#else
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#error "Unkown platform"
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#endif
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/* DMA related header and variables */
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spinlock_t aes_lock;
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#define CRTCL_SECT_INIT spin_lock_init(&aes_lock)
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#define CRTCL_SECT_START spin_lock_irqsave(&aes_lock, flag)
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#define CRTCL_SECT_END spin_unlock_irqrestore(&aes_lock, flag)
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/* Definition of constants */
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//#define AES_START IFX_AES_CON
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#define AES_MIN_KEY_SIZE 16
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#define AES_MAX_KEY_SIZE 32
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#define AES_BLOCK_SIZE 16
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#define CTR_RFC3686_NONCE_SIZE 4
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#define CTR_RFC3686_IV_SIZE 8
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#define CTR_RFC3686_MAX_KEY_SIZE (AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE)
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#ifdef CRYPTO_DEBUG
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extern char debug_level;
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#define DPRINTF(level, format, args...) if (level < debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
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#else
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#define DPRINTF(level, format, args...)
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#endif /* CRYPTO_DEBUG */
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static int disable_multiblock = 0;
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module_param(disable_multiblock, int, 0);
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static int disable_deudma = 1;
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/* Function decleration */
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int aes_chip_init(void);
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u32 endian_swap(u32 input);
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u32 input_swap(u32 input);
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u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
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void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
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int aes_memory_allocate(int value);
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int des_memory_allocate(int value);
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void memory_release(u32 *addr);
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struct aes_ctx {
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int key_length;
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u32 buf[AES_MAX_KEY_SIZE];
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u8 nonce[CTR_RFC3686_NONCE_SIZE];
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};
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struct aes_container {
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u8 *iv;
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u8 *src_buf;
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u8 *dst_buf;
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int mode;
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int encdec;
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int complete;
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int flag;
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u32 bytes_processed;
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u32 nbytes;
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struct ablkcipher_request arequest;
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};
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aes_priv_t *aes_queue;
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extern deu_drv_priv_t deu_dma_priv;
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void hexdump(unsigned char *buf, unsigned int len)
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{
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print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
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16, 1,
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buf, len, false);
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}
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/*! \fn void lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg, u8 *iv_arg,
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size_t nbytes, int encdec, int mode)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief main interface to AES hardware
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* \param ctx_arg crypto algo context
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* \param out_arg output bytestream
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* \param in_arg input bytestream
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* \param iv_arg initialization vector
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* \param nbytes length of bytestream
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* \param encdec 1 for encrypt; 0 for decrypt
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* \param mode operation mode such as ebc, cbc, ctr
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*
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*/
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static int lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
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u8 *iv_arg, size_t nbytes, int encdec, int mode)
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{
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/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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volatile struct aes_t *aes = (volatile struct aes_t *) AES_START;
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struct aes_ctx *ctx = (struct aes_ctx *)ctx_arg;
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u32 *in_key = ctx->buf;
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unsigned long flag;
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/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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int key_len = ctx->key_length;
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volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON;
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struct dma_device_info *dma_device = ifx_deu[0].dma_device;
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deu_drv_priv_t *deu_priv = (deu_drv_priv_t *)dma_device->priv;
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int wlen = 0;
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//u32 *outcopy = NULL;
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u32 *dword_mem_aligned_in = NULL;
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CRTCL_SECT_START;
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/* 128, 192 or 256 bit key length */
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aes->controlr.K = key_len / 8 - 2;
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if (key_len == 128 / 8) {
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aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
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aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
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aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
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aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
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}
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else if (key_len == 192 / 8) {
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aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
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aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
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aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
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aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
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aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
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aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
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}
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else if (key_len == 256 / 8) {
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aes->K7R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 0));
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aes->K6R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 1));
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aes->K5R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 2));
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aes->K4R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 3));
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aes->K3R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 4));
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aes->K2R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 5));
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aes->K1R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 6));
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aes->K0R = DEU_ENDIAN_SWAP(*((u32 *) in_key + 7));
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}
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else {
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printk (KERN_ERR "[%s %s %d]: Invalid key_len : %d\n", __FILE__, __func__, __LINE__, key_len);
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CRTCL_SECT_END;
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return -EINVAL;
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}
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/* let HW pre-process DEcryption key in any case (even if
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ENcryption is used). Key Valid (KV) bit is then only
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checked in decryption routine! */
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aes->controlr.PNK = 1;
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while (aes->controlr.BUS) {
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// this will not take long
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}
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AES_DMA_MISC_CONFIG();
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aes->controlr.E_D = !encdec; //encryption
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aes->controlr.O = mode; //0 ECB 1 CBC 2 OFB 3 CFB 4 CTR
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//aes->controlr.F = 128; //default; only for CFB and OFB modes; change only for customer-specific apps
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if (mode > 0) {
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aes->IV3R = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
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aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
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aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
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aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
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};
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/* Prepare Rx buf length used in dma psuedo interrupt */
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deu_priv->deu_rx_buf = (u32 *)out_arg;
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deu_priv->deu_rx_len = nbytes;
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/* memory alignment issue */
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dword_mem_aligned_in = (u32 *) DEU_DWORD_REORDERING(in_arg, aes_buff_in, BUFFER_IN, nbytes);
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dma->controlr.ALGO = 1; //AES
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dma->controlr.BS = 0;
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aes->controlr.DAU = 0;
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dma->controlr.EN = 1;
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while (aes->controlr.BUS) {
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// wait for AES to be ready
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};
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deu_priv->outcopy = (u32 *) DEU_DWORD_REORDERING(out_arg, aes_buff_out, BUFFER_OUT, nbytes);
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deu_priv->event_src = AES_ASYNC_EVENT;
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wlen = dma_device_write (dma_device, (u8 *)dword_mem_aligned_in, nbytes, NULL);
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if (wlen != nbytes) {
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dma->controlr.EN = 0;
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CRTCL_SECT_END;
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printk (KERN_ERR "[%s %s %d]: dma_device_write fail!\n", __FILE__, __func__, __LINE__);
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return -EINVAL;
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}
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// WAIT_AES_DMA_READY();
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CRTCL_SECT_END;
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if (mode > 0) {
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*((u32 *) iv_arg) = DEU_ENDIAN_SWAP(*((u32 *) iv_arg));
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*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
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*((u32 *) iv_arg + 2) = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
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*((u32 *) iv_arg + 3) = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
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}
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return -EINPROGRESS;
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}
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/* \fn static int count_sgs(struct scatterlist *sl, unsigned int total_bytes)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Counts and return the number of scatterlists
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* \param *sl Function pointer to the scatterlist
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* \param total_bytes The total number of bytes that needs to be encrypted/decrypted
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* \return The number of scatterlists
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*/
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static int count_sgs(struct scatterlist *sl, unsigned int total_bytes)
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{
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int i = 0;
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do {
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total_bytes -= sl[i].length;
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i++;
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} while (total_bytes > 0);
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return i;
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}
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/* \fn void lq_sg_init(struct scatterlist *src,
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* struct scatterlist *dst)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Maps the scatterlists into a source/destination page.
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* \param *src Pointer to the source scatterlist
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* \param *dst Pointer to the destination scatterlist
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*/
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static void lq_sg_init(struct aes_container *aes_con,struct scatterlist *src,
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struct scatterlist *dst)
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{
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struct page *dst_page, *src_page;
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src_page = sg_virt(src);
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aes_con->src_buf = (char *) src_page;
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dst_page = sg_virt(dst);
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aes_con->dst_buf = (char *) dst_page;
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}
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/* \fn static void lq_sg_complete(struct aes_container *aes_con)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Free the used up memory after encryt/decrypt.
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*/
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static void lq_sg_complete(struct aes_container *aes_con)
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{
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unsigned long queue_flag;
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spin_lock_irqsave(&aes_queue->lock, queue_flag);
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kfree(aes_con);
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spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
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}
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/* \fn static inline struct aes_container *aes_container_cast (
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* struct scatterlist *dst)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Locate the structure aes_container in memory.
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* \param *areq Pointer to memory location where ablkcipher_request is located
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* \return *aes_cointainer The function pointer to aes_container
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*/
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static inline struct aes_container *aes_container_cast (
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struct ablkcipher_request *areq)
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{
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return container_of(areq, struct aes_container, arequest);
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}
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/* \fn static int process_next_packet(struct aes_container *aes_con, struct ablkcipher_request *areq,
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* \ int state)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Process next packet to be encrypt/decrypt
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* \param *aes_con AES container structure
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* \param *areq Pointer to memory location where ablkcipher_request is located
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* \param state The state of the current packet (part of scatterlist or new packet)
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* \return -EINVAL: error, -EINPROGRESS: Crypto still running, 1: no more scatterlist
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*/
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static int process_next_packet(struct aes_container *aes_con, struct ablkcipher_request *areq,
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int state)
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{
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u8 *iv;
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int mode, dir, err = -EINVAL;
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unsigned long queue_flag;
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u32 inc, nbytes, remain, chunk_size;
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struct scatterlist *src = NULL;
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struct scatterlist *dst = NULL;
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struct crypto_ablkcipher *cipher;
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struct aes_ctx *ctx;
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spin_lock_irqsave(&aes_queue->lock, queue_flag);
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dir = aes_con->encdec;
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mode = aes_con->mode;
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iv = aes_con->iv;
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if (state & PROCESS_SCATTER) {
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src = scatterwalk_sg_next(areq->src);
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dst = scatterwalk_sg_next(areq->dst);
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if (!src || !dst) {
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spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
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return 1;
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}
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}
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else if (state & PROCESS_NEW_PACKET) {
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src = areq->src;
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dst = areq->dst;
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}
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remain = aes_con->bytes_processed;
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chunk_size = src->length;
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if (remain > DEU_MAX_PACKET_SIZE)
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inc = DEU_MAX_PACKET_SIZE;
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else if (remain > chunk_size)
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inc = chunk_size;
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else
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inc = remain;
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remain -= inc;
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aes_con->nbytes = inc;
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if (state & PROCESS_SCATTER) {
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aes_con->src_buf += aes_con->nbytes;
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aes_con->dst_buf += aes_con->nbytes;
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}
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lq_sg_init(aes_con, src, dst);
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nbytes = aes_con->nbytes;
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//printk("debug - Line: %d, func: %s, reqsize: %d, scattersize: %d\n",
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// __LINE__, __func__, nbytes, chunk_size);
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cipher = crypto_ablkcipher_reqtfm(areq);
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ctx = crypto_ablkcipher_ctx(cipher);
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if (aes_queue->hw_status == AES_IDLE)
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aes_queue->hw_status = AES_STARTED;
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aes_con->bytes_processed -= aes_con->nbytes;
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err = ablkcipher_enqueue_request(&aes_queue->list, &aes_con->arequest);
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if (err == -EBUSY) {
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spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
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printk("Failed to enqueue request, ln: %d, err: %d\n",
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__LINE__, err);
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return -EINVAL;
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}
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spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
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err = lq_deu_aes_core(ctx, aes_con->dst_buf, aes_con->src_buf, iv, nbytes, dir, mode);
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return err;
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}
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/* \fn static void process_queue (unsigned long data)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief tasklet to signal the dequeuing of the next packet to be processed
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* \param unsigned long data Not used
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* \return void
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*/
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static void process_queue(unsigned long data)
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{
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DEU_WAKEUP_EVENT(deu_dma_priv.deu_thread_wait, AES_ASYNC_EVENT,
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deu_dma_priv.aes_event_flags);
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}
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|
|
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/* \fn static int aes_crypto_thread (void *data)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief AES thread that handles crypto requests from upper layer & DMA
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* \param *data Not used
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* \return -EINVAL: DEU failure, -EBUSY: DEU HW busy, 0: exit thread
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*/
|
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static int aes_crypto_thread (void *data)
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|
{
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struct aes_container *aes_con = NULL;
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struct ablkcipher_request *areq = NULL;
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int err;
|
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unsigned long queue_flag;
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|
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daemonize("lq_aes_thread");
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printk("AES Queue Manager Starting\n");
|
|
|
|
while (1)
|
|
{
|
|
DEU_WAIT_EVENT(deu_dma_priv.deu_thread_wait, AES_ASYNC_EVENT,
|
|
deu_dma_priv.aes_event_flags);
|
|
|
|
spin_lock_irqsave(&aes_queue->lock, queue_flag);
|
|
|
|
/* wait to prevent starting a crypto session before
|
|
* exiting the dma interrupt thread.
|
|
*/
|
|
if (aes_queue->hw_status == AES_STARTED) {
|
|
areq = ablkcipher_dequeue_request(&aes_queue->list);
|
|
aes_con = aes_container_cast(areq);
|
|
aes_queue->hw_status = AES_BUSY;
|
|
}
|
|
else if (aes_queue->hw_status == AES_IDLE) {
|
|
areq = ablkcipher_dequeue_request(&aes_queue->list);
|
|
aes_con = aes_container_cast(areq);
|
|
aes_queue->hw_status = AES_STARTED;
|
|
}
|
|
else if (aes_queue->hw_status == AES_BUSY) {
|
|
areq = ablkcipher_dequeue_request(&aes_queue->list);
|
|
aes_con = aes_container_cast(areq);
|
|
}
|
|
else if (aes_queue->hw_status == AES_COMPLETED) {
|
|
lq_sg_complete(aes_con);
|
|
aes_queue->hw_status = AES_IDLE;
|
|
areq->base.complete(&areq->base, 0);
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
return 0;
|
|
}
|
|
//printk("debug ln: %d, bytes proc: %d\n", __LINE__, aes_con->bytes_processed);
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
|
|
if (!aes_con) {
|
|
printk("AES_CON return null\n");
|
|
goto aes_done;
|
|
}
|
|
|
|
if (aes_con->bytes_processed == 0) {
|
|
goto aes_done;
|
|
}
|
|
|
|
/* Process new packet or the next packet in a scatterlist */
|
|
if (aes_con->flag & PROCESS_NEW_PACKET) {
|
|
aes_con->flag = PROCESS_SCATTER;
|
|
err = process_next_packet(aes_con, areq, PROCESS_NEW_PACKET);
|
|
}
|
|
else
|
|
err = process_next_packet(aes_con, areq, PROCESS_SCATTER);
|
|
|
|
if (err == -EINVAL) {
|
|
areq->base.complete(&areq->base, err);
|
|
lq_sg_complete(aes_con);
|
|
printk("src/dst returned -EINVAL in func: %s\n", __func__);
|
|
}
|
|
else if (err > 0) {
|
|
printk("src/dst returned zero in func: %s\n", __func__);
|
|
goto aes_done;
|
|
}
|
|
|
|
continue;
|
|
|
|
aes_done:
|
|
//printk("debug line - %d, func: %s, qlen: %d\n", __LINE__, __func__, aes_queue->list.qlen);
|
|
areq->base.complete(&areq->base, 0);
|
|
lq_sg_complete(aes_con);
|
|
|
|
spin_lock_irqsave(&aes_queue->lock, queue_flag);
|
|
if (aes_queue->list.qlen > 0) {
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
tasklet_schedule(&aes_queue->aes_task);
|
|
}
|
|
else {
|
|
aes_queue->hw_status = AES_IDLE;
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
}
|
|
} //while(1)
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* \fn static int lq_aes_queue_mgr(struct aes_ctx *ctx, struct ablkcipher_request *areq,
|
|
u8 *iv, int dir, int mode)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief starts the process of queuing DEU requests
|
|
* \param *ctx crypto algo contax
|
|
* \param *areq Pointer to the balkcipher requests
|
|
* \param *iv Pointer to intput vector location
|
|
* \param dir Encrypt/Decrypt
|
|
* \mode The mode AES algo is running
|
|
* \return 0 if success
|
|
*/
|
|
|
|
static int lq_aes_queue_mgr(struct aes_ctx *ctx, struct ablkcipher_request *areq,
|
|
u8 *iv, int dir, int mode)
|
|
{
|
|
int err = -EINVAL;
|
|
unsigned long queue_flag;
|
|
struct scatterlist *src = areq->src;
|
|
struct scatterlist *dst = areq->dst;
|
|
struct aes_container *aes_con = NULL;
|
|
u32 remain, inc, nbytes = areq->nbytes;
|
|
u32 chunk_bytes = src->length;
|
|
|
|
|
|
aes_con = (struct aes_container *)kmalloc(sizeof(struct aes_container),
|
|
GFP_KERNEL);
|
|
|
|
if (!(aes_con)) {
|
|
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
|
|
__func__, __LINE__);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* AES encrypt/decrypt mode */
|
|
if (mode == 5) {
|
|
nbytes = AES_BLOCK_SIZE;
|
|
chunk_bytes = AES_BLOCK_SIZE;
|
|
mode = 0;
|
|
}
|
|
|
|
aes_con->bytes_processed = nbytes;
|
|
aes_con->arequest = *(areq);
|
|
remain = nbytes;
|
|
|
|
//printk("debug - Line: %d, func: %s, reqsize: %d, scattersize: %d\n",
|
|
// __LINE__, __func__, nbytes, chunk_bytes);
|
|
|
|
if (remain > DEU_MAX_PACKET_SIZE)
|
|
inc = DEU_MAX_PACKET_SIZE;
|
|
else if (remain > chunk_bytes)
|
|
inc = chunk_bytes;
|
|
else
|
|
inc = remain;
|
|
|
|
remain -= inc;
|
|
lq_sg_init(aes_con, src, dst);
|
|
|
|
if (remain <= 0)
|
|
aes_con->complete = 1;
|
|
else
|
|
aes_con->complete = 0;
|
|
|
|
aes_con->nbytes = inc;
|
|
aes_con->iv = iv;
|
|
aes_con->mode = mode;
|
|
aes_con->encdec = dir;
|
|
|
|
spin_lock_irqsave(&aes_queue->lock, queue_flag);
|
|
|
|
if (aes_queue->hw_status == AES_STARTED || aes_queue->hw_status == AES_BUSY ||
|
|
aes_queue->list.qlen > 0) {
|
|
|
|
aes_con->flag = PROCESS_NEW_PACKET;
|
|
err = ablkcipher_enqueue_request(&aes_queue->list, &aes_con->arequest);
|
|
|
|
/* max queue length reached */
|
|
if (err == -EBUSY) {
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
printk("Unable to enqueue request ln: %d, err: %d\n", __LINE__, err);
|
|
return err;
|
|
}
|
|
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
return -EINPROGRESS;
|
|
}
|
|
else if (aes_queue->hw_status == AES_IDLE)
|
|
aes_queue->hw_status = AES_STARTED;
|
|
|
|
aes_con->flag = PROCESS_SCATTER;
|
|
aes_con->bytes_processed -= aes_con->nbytes;
|
|
/* or enqueue the whole structure so as to get back the info
|
|
* at the moment that it's queued. nbytes might be different */
|
|
err = ablkcipher_enqueue_request(&aes_queue->list, &aes_con->arequest);
|
|
|
|
if (err == -EBUSY) {
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
printk("Unable to enqueue request ln: %d, err: %d\n", __LINE__, err);
|
|
return err;
|
|
}
|
|
|
|
spin_unlock_irqrestore(&aes_queue->lock, queue_flag);
|
|
return lq_deu_aes_core(ctx, aes_con->dst_buf, aes_con->src_buf, iv, inc, dir, mode);
|
|
|
|
}
|
|
|
|
/* \fn static int aes_setkey(struct crypto_ablkcipher *tfm, const u8 *in_key,
|
|
* unsigned int keylen)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Sets AES key
|
|
* \param *tfm Pointer to the ablkcipher transform
|
|
* \param *in_key Pointer to input keys
|
|
* \param key_len Length of the AES keys
|
|
* \return 0 is success, -EINVAL if bad key length
|
|
*/
|
|
|
|
static int aes_setkey(struct crypto_ablkcipher *tfm, const u8 *in_key,
|
|
unsigned int keylen)
|
|
{
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
|
unsigned long *flags = (unsigned long *) &tfm->base.crt_flags;
|
|
|
|
DPRINTF(2, "set_key in %s\n", __FILE__);
|
|
|
|
if (keylen != 16 && keylen != 24 && keylen != 32) {
|
|
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
|
|
return -EINVAL;
|
|
}
|
|
|
|
ctx->key_length = keylen;
|
|
DPRINTF(0, "ctx @%p, keylen %d, ctx->key_length %d\n", ctx, keylen, ctx->key_length);
|
|
memcpy ((u8 *) (ctx->buf), in_key, keylen);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* \fn static int aes_generic_setkey(struct crypto_ablkcipher *tfm, const u8 *in_key,
|
|
* unsigned int keylen)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Sets AES key
|
|
* \param *tfm Pointer to the ablkcipher transform
|
|
* \param *key Pointer to input keys
|
|
* \param keylen Length of AES keys
|
|
* \return 0 is success, -EINVAL if bad key length
|
|
*/
|
|
|
|
static int aes_generic_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
|
|
unsigned int keylen)
|
|
{
|
|
return aes_setkey(tfm, key, keylen);
|
|
}
|
|
|
|
/* \fn static int rfc3686_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *in_key,
|
|
* unsigned int keylen)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Sets AES key
|
|
* \param *tfm Pointer to the ablkcipher transform
|
|
* \param *in_key Pointer to input keys
|
|
* \param key_len Length of the AES keys
|
|
* \return 0 is success, -EINVAL if bad key length
|
|
*/
|
|
|
|
static int rfc3686_aes_setkey(struct crypto_ablkcipher *tfm,
|
|
const u8 *in_key, unsigned int keylen)
|
|
{
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
|
|
unsigned long *flags = (unsigned long *)&tfm->base.crt_flags;
|
|
|
|
DPRINTF(2, "ctr_rfc3686_aes_set_key in %s\n", __FILE__);
|
|
|
|
memcpy(ctx->nonce, in_key + (keylen - CTR_RFC3686_NONCE_SIZE),
|
|
CTR_RFC3686_NONCE_SIZE);
|
|
|
|
keylen -= CTR_RFC3686_NONCE_SIZE; // remove 4 bytes of nonce
|
|
|
|
if (keylen != 16 && keylen != 24 && keylen != 32) {
|
|
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
|
|
return -EINVAL;
|
|
}
|
|
|
|
ctx->key_length = keylen;
|
|
|
|
memcpy ((u8 *) (ctx->buf), in_key, keylen);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* \fn static int aes_encrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Encrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, NULL, CRYPTO_DIR_ENCRYPT, 5);
|
|
|
|
}
|
|
|
|
/* \fn static int aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Decrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
static int aes_decrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, NULL, CRYPTO_DIR_DECRYPT, 5);
|
|
}
|
|
|
|
/* \fn static int ecb_aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Encrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int ecb_aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 0);
|
|
|
|
}
|
|
/* \fn static int ecb_aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Decrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
static int ecb_aes_decrypt(struct ablkcipher_request *areq)
|
|
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 0);
|
|
}
|
|
|
|
/* \fn static int cbc_aes_encrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Encrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int cbc_aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 1);
|
|
|
|
}
|
|
|
|
/* \fn static int cbc_aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Decrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int cbc_aes_decrypt(struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 1);
|
|
}
|
|
#if 0
|
|
static int ofb_aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 2);
|
|
|
|
}
|
|
|
|
static int ofb_aes_decrypt(struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 2);
|
|
}
|
|
|
|
static int cfb_aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 3);
|
|
|
|
}
|
|
|
|
static int cfb_aes_decrypt(struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 3);
|
|
}
|
|
#endif
|
|
|
|
/* \fn static int ctr_aes_encrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Encrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int ctr_aes_encrypt (struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 4);
|
|
|
|
}
|
|
|
|
/* \fn static int ctr_aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Decrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int ctr_aes_decrypt(struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
|
|
return lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 4);
|
|
}
|
|
|
|
/* \fn static int rfc3686_aes_encrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
|
|
* \brief Encrypt function for AES algo
|
|
* \param *areq Pointer to ablkcipher request in memory
|
|
* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
|
|
*/
|
|
|
|
static int rfc3686_aes_encrypt(struct ablkcipher_request *areq)
|
|
{
|
|
struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
|
|
struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
|
|
int ret;
|
|
u8 *info = areq->info;
|
|
u8 rfc3686_iv[16];
|
|
|
|
memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
|
|
memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, info, CTR_RFC3686_IV_SIZE);
|
|
|
|
/* initialize counter portion of counter block */
|
|
*(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
|
|
cpu_to_be32(1);
|
|
|
|
areq->info = rfc3686_iv;
|
|
ret = lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_ENCRYPT, 4);
|
|
areq->info = info;
|
|
return ret;
|
|
}
|
|
|
|
/* \fn static int rfc3686_aes_decrypt(struct ablkcipher_request *areq)
|
|
* \ingroup IFX_AES_FUNCTIONS
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* \brief Decrypt function for AES algo
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* \param *areq Pointer to ablkcipher request in memory
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* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
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*/
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static int rfc3686_aes_decrypt(struct ablkcipher_request *areq)
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{
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struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);
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struct aes_ctx *ctx = crypto_ablkcipher_ctx(cipher);
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int ret;
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u8 *info = areq->info;
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u8 rfc3686_iv[16];
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/* set up counter block */
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memcpy(rfc3686_iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
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memcpy(rfc3686_iv + CTR_RFC3686_NONCE_SIZE, info, CTR_RFC3686_IV_SIZE);
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/* initialize counter portion of counter block */
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*(__be32 *)(rfc3686_iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
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cpu_to_be32(1);
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areq->info = rfc3686_iv;
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ret = lq_aes_queue_mgr(ctx, areq, areq->info, CRYPTO_DIR_DECRYPT, 4);
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areq->info = info;
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return ret;
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}
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struct lq_aes_alg {
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struct crypto_alg alg;
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};
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/* AES supported algo array */
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static struct lq_aes_alg aes_drivers_alg[] = {
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{
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.alg = {
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.cra_name = "aes",
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.cra_driver_name = "ifxdeu-aes",
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_type = &crypto_ablkcipher_type,
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.cra_priority = 300,
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.cra_module = THIS_MODULE,
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.cra_ablkcipher = {
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.setkey = aes_setkey,
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.encrypt = aes_encrypt,
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.decrypt = aes_decrypt,
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.geniv = "eseqiv",
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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}
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}
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},{
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.alg = {
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.cra_name = "ecb(aes)",
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.cra_driver_name = "ifxdeu-ecb(aes)",
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_type = &crypto_ablkcipher_type,
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.cra_priority = 400,
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.cra_module = THIS_MODULE,
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.cra_ablkcipher = {
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.setkey = aes_generic_setkey,
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.encrypt = ecb_aes_encrypt,
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.decrypt = ecb_aes_decrypt,
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.geniv = "eseqiv",
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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}
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}
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},{
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.alg = {
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.cra_name = "cbc(aes)",
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.cra_driver_name = "ifxdeu-cbc(aes)",
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_type = &crypto_ablkcipher_type,
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.cra_priority = 400,
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.cra_module = THIS_MODULE,
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.cra_ablkcipher = {
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.setkey = aes_generic_setkey,
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.encrypt = cbc_aes_encrypt,
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.decrypt = cbc_aes_decrypt,
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.geniv = "eseqiv",
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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}
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}
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},{
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.alg = {
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.cra_name = "ctr(aes)",
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.cra_driver_name = "ifxdeu-ctr(aes)",
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_type = &crypto_ablkcipher_type,
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.cra_priority = 400,
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.cra_module = THIS_MODULE,
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.cra_ablkcipher = {
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.setkey = aes_generic_setkey,
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.encrypt = ctr_aes_encrypt,
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.decrypt = ctr_aes_decrypt,
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.geniv = "eseqiv",
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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}
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}
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},{
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.alg = {
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.cra_name = "rfc3686(ctr(aes))",
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.cra_driver_name = "ifxdeu-rfc3686(ctr(aes))",
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aes_ctx),
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.cra_type = &crypto_ablkcipher_type,
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.cra_priority = 400,
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.cra_module = THIS_MODULE,
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.cra_ablkcipher = {
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.setkey = rfc3686_aes_setkey,
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.encrypt = rfc3686_aes_encrypt,
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.decrypt = rfc3686_aes_decrypt,
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.geniv = "eseqiv",
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = CTR_RFC3686_MAX_KEY_SIZE,
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//.max_keysize = AES_MAX_KEY_SIZE,
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//.ivsize = CTR_RFC3686_IV_SIZE,
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.ivsize = AES_BLOCK_SIZE, // else cannot reg
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}
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}
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}
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};
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/* \fn int __init lqdeu_async_aes_init (void)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief Initializes the Async. AES driver
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* \return 0 is success, -EINPROGRESS if encryting, EINVAL if failure
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*/
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int __init lqdeu_async_aes_init (void)
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{
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int i, j, ret = -EINVAL;
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#define IFX_DEU_DRV_VERSION "2.0.0"
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printk(KERN_INFO "Lantiq Technologies DEU Driver version %s\n", IFX_DEU_DRV_VERSION);
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for (i = 0; i < ARRAY_SIZE(aes_drivers_alg); i++) {
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ret = crypto_register_alg(&aes_drivers_alg[i].alg);
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printk("driver: %s\n", aes_drivers_alg[i].alg.cra_name);
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if (ret)
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goto aes_err;
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}
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aes_chip_init();
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CRTCL_SECT_INIT;
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printk (KERN_NOTICE "Lantiq DEU AES initialized %s %s.\n",
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disable_multiblock ? "" : " (multiblock)", disable_deudma ? "" : " (DMA)");
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return ret;
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aes_err:
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for (j = 0; j < i; j++)
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crypto_unregister_alg(&aes_drivers_alg[j].alg);
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printk(KERN_ERR "Lantiq %s driver initialization failed!\n", (char *)&aes_drivers_alg[i].alg.cra_driver_name);
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return ret;
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ctr_rfc3686_aes_err:
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for (i = 0; i < ARRAY_SIZE(aes_drivers_alg); i++) {
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if (!strcmp((char *)&aes_drivers_alg[i].alg.cra_name, "rfc3686(ctr(aes))"))
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crypto_unregister_alg(&aes_drivers_alg[j].alg);
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}
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printk (KERN_ERR "Lantiq ctr_rfc3686_aes initialization failed!\n");
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return ret;
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}
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/*! \fn void __exit ifxdeu_fini_aes (void)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief unregister aes driver
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*/
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void __exit lqdeu_fini_async_aes (void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(aes_drivers_alg); i++)
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crypto_unregister_alg(&aes_drivers_alg[i].alg);
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aes_queue->hw_status = AES_COMPLETED;
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DEU_WAKEUP_EVENT(deu_dma_priv.deu_thread_wait, AES_ASYNC_EVENT,
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deu_dma_priv.aes_event_flags);
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kfree(aes_queue);
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}
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