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cf50f72069
PLL for eth0 internal clock on ar913x is at 0x18050014 and AR913X_ETH0_PLL_SHIFT is 20 instead of 17 Signed-off-by: Chuanhong Guo <gch981213@gmail.com> |
6 years ago | |
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base-files | 6 years ago | |
dts | 6 years ago | |
files | 6 years ago | |
generic | 6 years ago | |
image | 6 years ago | |
nand | 6 years ago | |
patches-4.14 | 6 years ago | |
tiny | 6 years ago | |
Makefile | 6 years ago | |
config-4.14 | 6 years ago | |
modules.mk | 6 years ago |