ath79: ar913x: fix eth pll register
PLL for eth0 internal clock on ar913x is at 0x18050014 and AR913X_ETH0_PLL_SHIFT is 20 instead of 17 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>v19.07.3_mercusys_ac12_duma
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