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531 lines
12 KiB
Diff
531 lines
12 KiB
Diff
From 67f4c228c2bf515386cd54073104dc2e6eae85ea Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Fri, 10 Jul 2020 14:58:30 +0200
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Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
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This adds support for the NanoPi R2S from FriendlyArm.
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Rockchip RK3328 SoC
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1GB DDR4 RAM
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Gigabit Ethernet (WAN)
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Gigabit Ethernet (USB3) (LAN)
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USB 2.0 Host Port
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MicroSD slot
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Reset button
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WAN - LAN - SYS LED
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 34 +++
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arch/arm/dts/rk3328-nanopi-r2s.dts | 334 +++++++++++++++++++++
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board/rockchip/evb_rk3328/MAINTAINERS | 7 +
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configs/nanopi-r2s-rk3328_defconfig | 99 ++++++
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5 files changed, 475 insertions(+)
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create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
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create mode 100644 configs/nanopi-r2s-rk3328_defconfig
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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+ rk3328-nanopi-r2s.dtb \
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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@@ -0,0 +1,34 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
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+ * (C) Copyright 2020 David Bauer
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+ */
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+
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+#include "rk3328-u-boot.dtsi"
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+#include "rk3328-sdram-ddr4-666.dtsi"
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+/ {
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+ chosen {
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
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+ };
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+};
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+
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+&gpio0 {
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+ u-boot,dm-spl;
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+};
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+
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+&pinctrl {
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+ u-boot,dm-spl;
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+};
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+
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+&sdmmc0m1_gpio {
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+ u-boot,dm-spl;
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+};
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+
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+&pcfg_pull_up_4ma {
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+ u-boot,dm-spl;
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+};
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+
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+/* Need this and all the pinctrl/gpio stuff above to set pinmux */
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+&vcc_sd {
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+ u-boot,dm-spl;
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+};
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
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@@ -0,0 +1,334 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328.dtsi"
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+
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+/ {
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+ model = "FriendlyARM NanoPi R2S";
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+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ gmac_clkin: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ vcc_sd: sdmmc-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0m1_gpio>;
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+ regulator-name = "vcc_sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_sdio: sdmmcio-regulator {
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+ compatible = "regulator-gpio";
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+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdio_vcc_pin>;
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+ regulator-always-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc_sdio";
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+ regulator-settling-time-us = <5000>;
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+ regulator-type = "voltage";
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_sys: vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_pins>;
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+
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+ sys {
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+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:red:sys";
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+ };
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+
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+ lan {
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+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:green:lan";
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+ };
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+
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+ wan {
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r2s:green:wan";
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+ };
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+ };
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+
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+ gpio_keys {
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+ compatible = "gpio-keys-polled";
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+ poll-interval = <100>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&button_pins>;
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+
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+ reset {
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+ label = "Reset Button";
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+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ debounce-interval = <50>;
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&gmac2io {
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+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
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+ clock_in_out = "input";
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+ phy-supply = <&vcc_io>;
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+ phy-handle = <&rtl8211e>;
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+ phy-mode = "rgmii";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmiim1_pins>;
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+ snps,aal;
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+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 50000>;
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+ tx_delay = <0x24>;
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+ rx_delay = <0x18>;
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+ status = "okay";
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtl8211e: ethernet-phy@0 {
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+ reg = <0>;
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+ };
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+ };
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+};
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+
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+&i2c1 {
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+ status = "okay";
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+
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+ rk805: rk805@18 {
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+ compatible = "rockchip,rk805";
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+ reg = <0x18>;
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+ interrupt-parent = <&gpio2>;
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+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk805-clkout2";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc_sys>;
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+ vcc2-supply = <&vcc_sys>;
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+ vcc3-supply = <&vcc_sys>;
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+ vcc4-supply = <&vcc_sys>;
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+ vcc5-supply = <&vcc_io>;
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+ vcc6-supply = <&vcc_sys>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vdd_arm: DCDC_REG2 {
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+ regulator-name = "vdd_arm";
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_io: DCDC_REG4 {
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+ regulator-name = "vcc_io";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_18: LDO_REG1 {
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+ regulator-name = "vcc_18";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcc18_emmc: LDO_REG2 {
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+ regulator-name = "vcc18_emmc";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdd_10: LDO_REG3 {
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+ regulator-name = "vdd_10";
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1000000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&io_domains {
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+ status = "okay";
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+
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+ vccio1-supply = <&vcc_io>;
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+ vccio2-supply = <&vcc18_emmc>;
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+ vccio3-supply = <&vcc_sdio>;
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+ vccio4-supply = <&vcc_18>;
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+ vccio5-supply = <&vcc_io>;
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+ vccio6-supply = <&vcc_io>;
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+ pmuio-supply = <&vcc_io>;
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+};
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+
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+&pinctrl {
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+ leds {
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+ led_pins: led-pins {
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+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
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+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
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+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ button {
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+ button_pins: button-pins {
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+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ sd {
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+ sdio_vcc_pin: sdio-vcc-pin {
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+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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+
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+&sdmmc {
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+ bus-width = <4>;
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+ cap-mmc-highspeed;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ max-frequency = <150000000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
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+ vmmc-supply = <&vcc_sd>;
|
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+ vqmmc-supply = <&vcc_sdio>;
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+ status = "okay";
|
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+};
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+
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+&tsadc {
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+ rockchip,hw-tshut-mode = <0>;
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+ rockchip,hw-tshut-polarity = <0>;
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+ status = "okay";
|
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+};
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+
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+&uart2 {
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+ status = "okay";
|
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+};
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+
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+&u2phy {
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+ status = "okay";
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+
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+ u2phy_host: host-port {
|
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+ status = "okay";
|
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+ };
|
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+};
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+
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+&usb_host0_ehci {
|
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+ status = "okay";
|
|
+};
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+
|
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+&usb_host0_ohci {
|
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+ status = "okay";
|
|
+};
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--- a/board/rockchip/evb_rk3328/MAINTAINERS
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+++ b/board/rockchip/evb_rk3328/MAINTAINERS
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@@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
|
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F: include/configs/evb_rk3328.h
|
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F: configs/evb-rk3328_defconfig
|
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|
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+NANOPI-R2S-RK3328
|
|
+M: David Bauer <mail@david-bauer.net>
|
|
+S: Maintained
|
|
+F: configs/nanopi-r2s-rk3328_defconfig
|
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+F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
|
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+F: arch/arm/dts/rk3328-nanopi-r2s.dts
|
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+
|
|
ROC-RK3328-CC
|
|
M: Loic Devulder <ldevulder@suse.com>
|
|
M: Chen-Yu Tsai <wens@csie.org>
|
|
--- /dev/null
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+++ b/configs/nanopi-r2s-rk3328_defconfig
|
|
@@ -0,0 +1,99 @@
|
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+CONFIG_ARM=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00200000
|
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+CONFIG_SPL_GPIO_SUPPORT=y
|
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+CONFIG_ENV_OFFSET=0x3F8000
|
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+CONFIG_ROCKCHIP_RK3328=y
|
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+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
|
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+CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
|
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
|
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
|
+CONFIG_SPL_STACK_R_ADDR=0x600000
|
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+CONFIG_NR_DRAM_BANKS=1
|
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+CONFIG_DEBUG_UART_BASE=0xFF130000
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
+CONFIG_SMBIOS_PRODUCT_NAME="nanopi_r2s_rk3328"
|
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+CONFIG_DEBUG_UART=y
|
|
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
|
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+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
|
+CONFIG_FIT=y
|
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+CONFIG_FIT_VERBOSE=y
|
|
+CONFIG_SPL_LOAD_FIT=y
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
|
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+CONFIG_MISC_INIT_R=y
|
|
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
|
+CONFIG_SPL_STACK_R=y
|
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+CONFIG_SPL_I2C_SUPPORT=y
|
|
+CONFIG_SPL_POWER_SUPPORT=y
|
|
+CONFIG_SPL_ATF=y
|
|
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
+CONFIG_CMD_BOOTZ=y
|
|
+CONFIG_CMD_GPT=y
|
|
+CONFIG_CMD_MMC=y
|
|
+CONFIG_CMD_USB=y
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
+CONFIG_CMD_TIME=y
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
+CONFIG_TPL_OF_CONTROL=y
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
+CONFIG_TPL_OF_PLATDATA=y
|
|
+CONFIG_ENV_IS_IN_MMC=y
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
+CONFIG_NET_RANDOM_ETHADDR=y
|
|
+CONFIG_TPL_DM=y
|
|
+CONFIG_REGMAP=y
|
|
+CONFIG_SPL_REGMAP=y
|
|
+CONFIG_TPL_REGMAP=y
|
|
+CONFIG_SYSCON=y
|
|
+CONFIG_SPL_SYSCON=y
|
|
+CONFIG_TPL_SYSCON=y
|
|
+CONFIG_CLK=y
|
|
+CONFIG_SPL_CLK=y
|
|
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
|
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
+CONFIG_MMC_DW=y
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
+CONFIG_SF_DEFAULT_SPEED=20000000
|
|
+CONFIG_DM_ETH=y
|
|
+CONFIG_ETH_DESIGNWARE=y
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
|
+CONFIG_PINCTRL=y
|
|
+CONFIG_SPL_PINCTRL=y
|
|
+CONFIG_DM_PMIC=y
|
|
+CONFIG_PMIC_RK8XX=y
|
|
+CONFIG_SPL_DM_REGULATOR=y
|
|
+CONFIG_REGULATOR_PWM=y
|
|
+CONFIG_DM_REGULATOR_FIXED=y
|
|
+CONFIG_SPL_DM_REGULATOR_FIXED=y
|
|
+CONFIG_REGULATOR_RK8XX=y
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
+CONFIG_RAM=y
|
|
+CONFIG_SPL_RAM=y
|
|
+CONFIG_TPL_RAM=y
|
|
+CONFIG_DM_RESET=y
|
|
+CONFIG_BAUDRATE=1500000
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
|
+CONFIG_SYSRESET=y
|
|
+# CONFIG_TPL_SYSRESET is not set
|
|
+CONFIG_USB=y
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
+CONFIG_USB_XHCI_DWC3=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
+CONFIG_USB_OHCI_HCD=y
|
|
+CONFIG_USB_OHCI_GENERIC=y
|
|
+CONFIG_USB_DWC2=y
|
|
+CONFIG_USB_DWC3=y
|
|
+# CONFIG_USB_DWC3_GADGET is not set
|
|
+CONFIG_USB_GADGET=y
|
|
+CONFIG_USB_GADGET_DWC2_OTG=y
|
|
+CONFIG_SPL_TINY_MEMSET=y
|
|
+CONFIG_TPL_TINY_MEMSET=y
|
|
+CONFIG_ERRNO_STR=y
|
|
+CONFIG_SMBIOS_MANUFACTURER="pine64"
|