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650 lines
19 KiB
Diff
650 lines
19 KiB
Diff
--- a/arch/arm/mach-kirkwood/Kconfig
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+++ b/arch/arm/mach-kirkwood/Kconfig
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@@ -68,6 +68,9 @@ config TARGET_SBx81LIFXCAT
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config TARGET_DB_88F6281_BP
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bool "Marvell DB-88F6281-BP"
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+config TARGET_NSA325
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+ bool "Zyxel NSA325 board"
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+
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endchoice
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config SYS_SOC
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@@ -91,6 +94,7 @@ source "board/Seagate/goflexhome/Kconfig
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source "board/Seagate/nas220/Kconfig"
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source "board/zyxel/nsa310/Kconfig"
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source "board/zyxel/nsa310s/Kconfig"
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+source "board/zyxel/nsa325/Kconfig"
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source "board/alliedtelesis/SBx81LIFKW/Kconfig"
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source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
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source "board/Marvell/db-88f6281-bp/Kconfig"
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--- /dev/null
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+++ b/board/zyxel/nsa325/Kconfig
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@@ -0,0 +1,12 @@
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+if TARGET_NSA325
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+
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+config SYS_BOARD
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+ default "nsa325"
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+
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+config SYS_VENDOR
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+ default "zyxel"
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+
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+config SYS_CONFIG_NAME
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+ default "nsa325"
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+
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+endif
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--- /dev/null
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+++ b/board/zyxel/nsa325/MAINTAINERS
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@@ -0,0 +1,6 @@
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+NSA325 BOARD
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+M: Alberto Bursi <alberto.bursi@outlook.it>
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+S: Maintained
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+F: board/zyxel/nsa325/
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+F: include/configs/nsa325.h
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+F: configs/nsa325_defconfig
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--- /dev/null
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+++ b/board/zyxel/nsa325/Makefile
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@@ -0,0 +1,13 @@
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+#
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+# (C) Copyright 2015 bodhi <mibodhi@gmail.com>
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+#
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+# Based on
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+# (C) Copyright 2009
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+# Marvell Semiconductor <www.marvell.com>
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+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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+#
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+# SPDX-License-Identifier: GPL-2.0+
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+#
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+
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+obj-y := nsa325.o
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+
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--- /dev/null
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+++ b/board/zyxel/nsa325/kwbimage.cfg
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@@ -0,0 +1,78 @@
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+# Copyright (C) 2015 bodhi <mibodhi@gmail.com>
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+#
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+# Extracted from Zyxel GPL source for u-boot-1.1.4_NSA325v2
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+#
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+# See file CREDITS for list of people who contributed to this
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+# project.
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+#
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+# This program is free software; you can redistribute it and/or
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+# modify it under the terms of the GNU General Public License as
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+# published by the Free Software Foundation; either version 2 of
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+# the License, or (at your option) any later version.
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+#
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+# This program is distributed in the hope that it will be useful,
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+# but WITHOUT ANY WARRANTY; without even the implied warranty of
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+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+# GNU General Public License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with this program; if not, write to the Free Software
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+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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+# MA 02110-1301 USA
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+#
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+# Refer docs/README.kwimage for more details about how-to configure
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+# and create kirkwood boot image
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+#
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+
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+# Boot Media configurations
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+#BOOT_FROM uart
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+BOOT_FROM nand
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+NAND_ECC_MODE default
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+NAND_PAGE_SIZE 0x0800
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+
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+# SOC registers configuration using bootrom header extension
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+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
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+
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+# Configure RGMII-0 interface pad voltage to 1.8V
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+DATA 0xFFD100e0 0x1b1b1b9b
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+
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+#Dram initalization
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+DATA 0xFFD01400 0x4301503E # DDR Configuration register
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+DATA 0xFFD01404 0xB9843000 # DDR Controller Control Low
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+DATA 0xFFD01408 0x33137777 # DDR Timing (Low)
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+DATA 0xFFD0140C 0x16000C55 # DDR Timing (High)
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+DATA 0xFFD01410 0x04000000 # DDR Address Control
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+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
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+DATA 0xFFD01418 0x00000000 # DDR Operation
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+DATA 0xFFD0141C 0x00000672 # DDR Mode
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+DATA 0xFFD01420 0x00000004 # DDR Extended Mode
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+DATA 0xFFD01424 0x0000F14F # DDR Controller Control High
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+DATA 0xFFD01428 0x000D6720 # DDR3 ODT Read Timing
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+DATA 0xFFD0147C 0x0000B571 # DDR2 ODT Write Timing
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+DATA 0xFFD01504 0x1FFFFFF1 # CS[0]n Size
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+DATA 0xFFD01508 0x20000000 # CS[1]n Base address to 512Mb
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+DATA 0xFFD0150C 0x1FFFFFF4 # CS[1]n Size 512Mb Window enabled for CS1
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+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
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+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
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+DATA 0xFFD01494 0x00120000 # DDR ODT Control (Low)
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+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
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+DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
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+
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+DATA 0xFFD015D0 0x00000630
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+DATA 0xFFD015D4 0x00000046
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+DATA 0xFFD015D8 0x00000008
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+DATA 0xFFD015DC 0x00000000
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+DATA 0xFFD015E0 0x00000023
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+DATA 0xFFD015E4 0x00203C18
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+DATA 0xFFD01620 0x00384800
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+DATA 0xFFD01480 0x00000001
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+DATA 0xFFD20134 0x66666666
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+DATA 0xFFD20138 0x00066666
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+
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+#Disable nsa325 hardware watchdog to allow successful kwbooting
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+DATA 0xFFD10100 0x00004000 # set GPIO 14 to high to disable the watchdog
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+DATA 0xFFD10104 0xFFFFBFFF # set GPIO 14 to output (to block any other input to it)
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+
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+# End of Header extension
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+DATA 0x0 0x0
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+
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--- /dev/null
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+++ b/board/zyxel/nsa325/nsa325.c
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@@ -0,0 +1,265 @@
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+/*
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+ * Copyright (C) 2015 bodhi <mibodhi@gmail.com>
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+ *
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+ * Based on
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+ * Copyright (C) 2014 Jason Plum <jplum@archlinuxarm.org>
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+ *
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+ * Based on nsa320.c originall written by
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+ * Copyright (C) 2012 Peter Schildmann <linux@schildmann.info>
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+ *
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+ * Based on guruplug.c originally written by
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+ * Siddarth Gore <gores@marvell.com>
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+ * (C) Copyright 2009
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+ * Marvell Semiconductor <www.marvell.com>
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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+ * MA 02110-1301 USA
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+ */
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+
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+#include <common.h>
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+#include <miiphy.h>
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+#include <asm/arch/soc.h>
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+#include <asm/arch/mpp.h>
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+#include <asm/arch/cpu.h>
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+#include <asm/gpio.h>
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+#include <asm/io.h>
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+#include "nsa325.h"
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+#include <asm/arch/gpio.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+int board_early_init_f(void)
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+{
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+ /*
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+ * default gpio configuration
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+ * There are maximum 64 gpios controlled through 2 sets of registers
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+ * the below configuration configures mainly initial LED status
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+ */
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+ mvebu_config_gpio(NSA325_VAL_LOW, NSA325_VAL_HIGH,
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+ NSA325_OE_LOW, NSA325_OE_HIGH);
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+
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+ /* Multi-Purpose Pins Functionality configuration */
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+ /* (all LEDs & power off active high) */
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+ u32 kwmpp_config[] = {
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+ MPP0_NF_IO2,
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+ MPP1_NF_IO3,
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+ MPP2_NF_IO4,
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+ MPP3_NF_IO5,
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+ MPP4_NF_IO6,
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+ MPP5_NF_IO7,
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+ MPP6_SYSRST_OUTn,
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+ MPP7_GPO,
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+ MPP8_TW_SDA, /* PCF8563 RTC chip */
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+ MPP9_TW_SCK, /* connected to TWSI */
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+ MPP10_UART0_TXD,
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+ MPP11_UART0_RXD,
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+ MPP12_GPO, /* HDD2 LED (green) */
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+ MPP13_GPIO, /* HDD2 LED (red) */
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+ MPP14_GPIO, /* MCU DATA pin (in) */
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+ MPP15_GPIO, /* USB LED (green) */
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+ MPP16_GPIO, /* MCU CLK pin (out) */
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+ MPP17_GPIO, /* MCU ACT pin (out) */
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+ MPP18_NF_IO0,
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+ MPP19_NF_IO1,
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+ MPP20_GPIO,
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+ MPP21_GPIO, /* USB power */
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+ MPP22_GPIO,
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+ MPP23_GPIO,
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+ MPP24_GPIO,
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+ MPP25_GPIO,
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+ MPP26_GPIO,
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+ MPP27_GPIO,
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+ MPP28_GPIO, /* SYS LED (green) */
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+ MPP29_GPIO, /* SYS LED (orange) */
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+ MPP30_GPIO,
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+ MPP31_GPIO,
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+ MPP32_GPIO,
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+ MPP33_GPIO,
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+ MPP34_GPIO,
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+ MPP35_GPIO,
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+ MPP36_GPIO, /* reset button */
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+ MPP37_GPIO, /* copy button */
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+ MPP38_GPIO, /* VID B0 */
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+ MPP39_GPIO, /* COPY LED (green) */
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+ MPP40_GPIO, /* COPY LED (red) */
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+ MPP41_GPIO, /* HDD1 LED (green) */
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+ MPP42_GPIO, /* HDD1 LED (red) */
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+ MPP43_GPIO, /* HTP pin */
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+ MPP44_GPIO, /* buzzer */
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+ MPP45_GPIO, /* VID B1 */
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+ MPP46_GPIO, /* power button */
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+ MPP47_GPIO, /* HDD2 power */
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+ MPP48_GPIO, /* power off */
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+ 0
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+ };
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+ kirkwood_mpp_conf(kwmpp_config, NULL);
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+ return 0;
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+}
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+
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+int board_init(void)
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+{
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+
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+ /* address of boot parameters */
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+ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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+
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+ /* This disables the hardware watchdog in the mcu on this board. */
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+ kw_gpio_set_valid(14, 1);
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+ kw_gpio_direction_output(14, 0);
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+ kw_gpio_set_value(14, 1);
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+
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+ return 0;
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+}
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+
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+#ifdef CONFIG_RESET_PHY_R
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+/* Configure and enable MV88E1318 PHY */
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+void reset_phy(void)
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+{
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+ u16 reg;
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+ u16 devadr;
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+ char *name = "egiga0";
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+
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+ if (miiphy_set_current_dev(name))
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+ return;
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+
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+ /* command to read PHY dev address */
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+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
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+ printf("Err..%s could not read PHY dev address\n",
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+ __FUNCTION__);
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+ return;
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+ }
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+
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+ /* Set RGMII delay */
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+ miiphy_write(name, devadr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
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+ miiphy_read(name, devadr, MV88E1318_MAC_CTRL_REG, ®);
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+ reg |= (MV88E1318_RGMII_RXTM_CTRL | MV88E1318_RGMII_TXTM_CTRL);
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+ miiphy_write(name, devadr, MV88E1318_MAC_CTRL_REG, reg);
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+ miiphy_write(name, devadr, MV88E1318_PGADR_REG, 0);
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+
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+ /* reset the phy */
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+ miiphy_reset(name, devadr);
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+
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+ /* The ZyXEL NSA325 uses the 88E1310S Alaska (interface identical to 88E1318) */
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+ /* and has an MCU attached to the LED[2] via tristate interrupt */
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+ reg = 0;
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+
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+ /* switch to LED register page */
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+ miiphy_write(name, devadr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
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+ /* read out LED polarity register */
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+ miiphy_read(name, devadr, MV88E1318_LED_POL_REG, ®);
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+ /* clear 4, set 5 - LED2 low, tri-state */
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+ reg &= ~(MV88E1318_LED2_4);
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+ reg |= (MV88E1318_LED2_5);
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+ /* write back LED polarity register */
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+ miiphy_write(name, devadr, MV88E1318_LED_POL_REG, reg);
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+ /* jump back to page 0, per the PHY chip documenation. */
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+ miiphy_write(name, devadr, MV88E1318_PGADR_REG, 0);
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+
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+ /* Set the phy back to auto-negotiation mode. Onboard mcu sets it as 10Mbits/s on poweroff for WoL function */
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+ miiphy_write(name, devadr, 0x4, 0x1e1);
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+ miiphy_write(name, devadr, 0x9, 0x300);
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+ /* Downshift */
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+ miiphy_write(name, devadr, 0x10, 0x3860);
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+ miiphy_write(name, devadr, 0x0, 0x9140);
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+
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+ printf("MV88E1318 PHY initialized on %s\n", name);
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+
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+}
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+#endif /* CONFIG_RESET_PHY_R */
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+
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+#ifdef CONFIG_SHOW_BOOT_PROGRESS
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+void show_boot_progress(int val)
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+{
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+ struct kwgpio_registers *gpio0 = (struct kwgpio_registers *)MVEBU_GPIO0_BASE;
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+ u32 dout0 = readl(&gpio0->dout);
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+ u32 blen0 = readl(&gpio0->blink_en);
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+
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+ struct kwgpio_registers *gpio1 = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
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+ u32 dout1 = readl(&gpio1->dout);
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+ u32 blen1 = readl(&gpio1->blink_en);
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+
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+ switch (val) {
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+ case BOOTSTAGE_ID_DECOMP_IMAGE:
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+ writel(blen0 & ~(SYS_GREEN_LED | SYS_ORANGE_LED), &gpio0->blink_en);
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+ writel((dout0 & ~SYS_GREEN_LED) | SYS_ORANGE_LED, &gpio0->dout);
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+ break;
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+ case BOOTSTAGE_ID_RUN_OS:
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+ writel(dout0 & ~SYS_ORANGE_LED, &gpio0->dout);
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+ writel(blen0 | SYS_GREEN_LED, &gpio0->blink_en);
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+ break;
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+ case BOOTSTAGE_ID_NET_START:
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+ writel(dout1 & ~COPY_RED_LED, &gpio1->dout);
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+ writel((blen1 & ~COPY_RED_LED) | COPY_GREEN_LED, &gpio1->blink_en);
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+ break;
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+ case BOOTSTAGE_ID_NET_LOADED:
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+ writel(blen1 & ~(COPY_RED_LED | COPY_GREEN_LED), &gpio1->blink_en);
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+ writel((dout1 & ~COPY_RED_LED) | COPY_GREEN_LED, &gpio1->dout);
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+ break;
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+ case -BOOTSTAGE_ID_NET_NETLOOP_OK:
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+ case -BOOTSTAGE_ID_NET_LOADED:
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+ writel(dout1 & ~COPY_GREEN_LED, &gpio1->dout);
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+ writel((blen1 & ~COPY_GREEN_LED) | COPY_RED_LED, &gpio1->blink_en);
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+ break;
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+ default:
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+ if (val < 0) {
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+ /* error */
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+ printf("Error occured, error code = %d\n", -val);
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+ writel(dout0 & ~SYS_GREEN_LED, &gpio0->dout);
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+ writel(blen0 | SYS_ORANGE_LED, &gpio0->blink_en);
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+ }
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+ break;
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+ }
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+}
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+#endif
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+
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+#if defined(CONFIG_KIRKWOOD_GPIO)
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+/* Return GPIO button status */
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+/*
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+un-pressed:
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+ gpio-36 (Reset Button ) in hi (act lo) - IRQ edge (clear )
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+ gpio-37 (Copy Button ) in hi (act lo) - IRQ edge (clear )
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+ gpio-46 (Power Button ) in lo (act hi) - IRQ edge (clear )
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+pressed
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+ gpio-36 (Reset Button ) in lo (act hi) - IRQ edge (clear )
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+ gpio-37 (Copy Button ) in lo (act hi) - IRQ edge (clear )
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+ gpio-46 (Power Button ) in hi (act lo) - IRQ edge (clear )
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+*/
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+
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+static int
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+do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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+{
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+ if (strcmp(argv[1], "power") == 0) {
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+ kw_gpio_set_valid(BTN_POWER, GPIO_INPUT_OK);
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+ kw_gpio_direction_input(BTN_POWER);
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+ return !kw_gpio_get_value(BTN_POWER);
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+ }
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+ else if (strcmp(argv[1], "reset") == 0)
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+ return kw_gpio_get_value(BTN_RESET);
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+ else if (strcmp(argv[1], "copy") == 0)
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+ return kw_gpio_get_value(BTN_COPY);
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+ else
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+ return -1;
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+}
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+
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+
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+U_BOOT_CMD(button, 2, 0, do_read_button,
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+ "Return GPIO button status 0=off 1=on",
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+ "- button power|reset|copy: test buttons states\n"
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+);
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+
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+#endif
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+
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--- /dev/null
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|
+++ b/board/zyxel/nsa325/nsa325.h
|
|
@@ -0,0 +1,77 @@
|
|
+/*
|
|
+ * Copyright (C) 2014 Jason Plum <jplum@archlinuxarm.org>
|
|
+ *
|
|
+ * Based on nsa320.h originall written by
|
|
+ * Copyright (C) 2012 Peter Schildmann <linux@schildmann.info>
|
|
+ *
|
|
+ * Based on guruplug.h originally written by
|
|
+ * Siddarth Gore <gores@marvell.com>
|
|
+ * (C) Copyright 2009
|
|
+ * Marvell Semiconductor <www.marvell.com>
|
|
+ *
|
|
+ * See file CREDITS for list of people who contributed to this
|
|
+ * project.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License as
|
|
+ * published by the Free Software Foundation; either version 2 of
|
|
+ * the License, or (at your option) any later version.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU General Public License
|
|
+ * along with this program; if not, write to the Free Software
|
|
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
|
+ * MA 02110-1301 USA
|
|
+ */
|
|
+
|
|
+#ifndef __NSA325_H
|
|
+#define __NSA325_H
|
|
+
|
|
+/* low GPIO's */
|
|
+#define HDD2_GREEN_LED (1 << 12)
|
|
+#define HDD2_RED_LED (1 << 13)
|
|
+#define USB_GREEN_LED (1 << 15)
|
|
+#define USB_POWER (1 << 21)
|
|
+#define SYS_GREEN_LED (1 << 28)
|
|
+#define SYS_ORANGE_LED (1 << 29)
|
|
+
|
|
+#define PIN_USB_GREEN_LED 15
|
|
+#define PIN_USB_POWER 21
|
|
+
|
|
+#define NSA325_OE_LOW (~(HDD2_GREEN_LED | HDD2_RED_LED | \
|
|
+ USB_GREEN_LED | USB_POWER | \
|
|
+ SYS_GREEN_LED | SYS_ORANGE_LED))
|
|
+#define NSA325_VAL_LOW (SYS_GREEN_LED | USB_POWER)
|
|
+
|
|
+/* high GPIO's */
|
|
+#define COPY_GREEN_LED (1 << 7)
|
|
+#define COPY_RED_LED (1 << 8)
|
|
+#define HDD1_GREEN_LED (1 << 9)
|
|
+#define HDD1_RED_LED (1 << 10)
|
|
+#define HDD2_POWER (1 << 15)
|
|
+#define WATCHDOG_SIGNAL (1 << 14)
|
|
+
|
|
+#define NSA325_OE_HIGH (~(COPY_GREEN_LED | COPY_RED_LED | \
|
|
+ HDD1_GREEN_LED | HDD1_RED_LED | HDD2_POWER | WATCHDOG_SIGNAL ))
|
|
+#define NSA325_VAL_HIGH (WATCHDOG_SIGNAL | HDD2_POWER)
|
|
+
|
|
+/* PHY related */
|
|
+#define MV88E1318_PGADR_REG 22
|
|
+#define MV88E1318_MAC_CTRL_PG 2
|
|
+#define MV88E1318_MAC_CTRL_REG 21
|
|
+#define MV88E1318_RGMII_TXTM_CTRL (1 << 4)
|
|
+#define MV88E1318_RGMII_RXTM_CTRL (1 << 5)
|
|
+#define MV88E1318_LED_PG 3
|
|
+#define MV88E1318_LED_POL_REG 17
|
|
+#define MV88E1318_LED2_4 (1 << 4)
|
|
+#define MV88E1318_LED2_5 (1 << 5)
|
|
+
|
|
+#define BTN_POWER 46
|
|
+#define BTN_RESET 36
|
|
+#define BTN_COPY 37
|
|
+
|
|
+#endif /* __NSA325_H */
|
|
--- /dev/null
|
|
+++ b/configs/nsa325_defconfig
|
|
@@ -0,0 +1,48 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_SYS_DCACHE_OFF=y
|
|
+CONFIG_ARCH_CPU_INIT=y
|
|
+CONFIG_KIRKWOOD=y
|
|
+CONFIG_SYS_TEXT_BASE=0x600000
|
|
+CONFIG_TARGET_NSA325=y
|
|
+CONFIG_IDENT_STRING="\nZyXEL NSA325 2-Bay Power Media Server"
|
|
+CONFIG_NR_DRAM_BANKS=2
|
|
+CONFIG_BOOTDELAY=3
|
|
+CONFIG_SYS_PROMPT="NSA325> "
|
|
+# CONFIG_CMD_IMLS is not set
|
|
+# CONFIG_CMD_FLASH is not set
|
|
+CONFIG_MVGBE=y
|
|
+CONFIG_MII=y
|
|
+CONFIG_SYS_NS16550=y
|
|
+CONFIG_CMD_FDT=y
|
|
+CONFIG_OF_LIBFDT=y
|
|
+CONFIG_CMD_SETEXPR=y
|
|
+CONFIG_CMD_DHCP=y
|
|
+CONFIG_CMD_MII=y
|
|
+CONFIG_CMD_PING=y
|
|
+CONFIG_CMD_DNS=y
|
|
+CONFIG_CMD_SNTP=y
|
|
+CONFIG_CMD_USB=y
|
|
+CONFIG_USB=y
|
|
+CONFIG_CMD_DATE=y
|
|
+CONFIG_CMD_EXT2=y
|
|
+CONFIG_CMD_EXT4=y
|
|
+CONFIG_CMD_FAT=y
|
|
+CONFIG_CMD_JFFS2=y
|
|
+CONFIG_MTD=y
|
|
+CONFIG_MTD_RAW_NAND=y
|
|
+CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x0c0000(uboot),0x80000(uboot_env),0x7ec0000(ubi)"
|
|
+CONFIG_CMD_MTDPARTS=y
|
|
+CONFIG_CMD_ENV=y
|
|
+CONFIG_CMD_NAND=y
|
|
+CONFIG_EFI_PARTITION=y
|
|
+CONFIG_ENV_IS_IN_NAND=y
|
|
+CONFIG_ENV_SIZE=0x20000
|
|
+CONFIG_ENV_OFFSET=0xC0000
|
|
+CONFIG_ENV_SECT_SIZE=0x20000
|
|
+CONFIG_ENV_ADDR=0xC0000
|
|
+CONFIG_CMD_UBI=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_STORAGE=y
|
|
+CONFIG_LZMA=y
|
|
+CONFIG_LZO=y
|
|
+CONFIG_SYS_LONGHELP=y
|
|
--- /dev/null
|
|
+++ b/include/configs/nsa325.h
|
|
@@ -0,0 +1,106 @@
|
|
+/*
|
|
+ * (C) Copyright 2016 bodhi <mibodhi@gmail.com>
|
|
+ *
|
|
+ * Based on
|
|
+ * Copyright (C) 2014 Jason Plum <jplum@archlinuxarm.org>
|
|
+ * Based on
|
|
+ * Copyright (C) 2012 Peter Schildmann <linux@schildmann.info>
|
|
+ *
|
|
+ * Based on guruplug.h originally written by
|
|
+ * Siddarth Gore <gores@marvell.com>
|
|
+ * (C) Copyright 2009
|
|
+ * Marvell Semiconductor <www.marvell.com>
|
|
+ *
|
|
+ * See file CREDITS for list of people who contributed to this
|
|
+ * project.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License as
|
|
+ * published by the Free Software Foundation; either version 2 of
|
|
+ * the License, or (at your option) any later version.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU General Public License
|
|
+ * along with this program; if not, write to the Free Software
|
|
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
|
+ * MA 02110-1301 USA
|
|
+ */
|
|
+
|
|
+#ifndef _CONFIG_NSA325_H
|
|
+#define _CONFIG_NSA325_H
|
|
+
|
|
+/*
|
|
+ * High Level Configuration Options (easy to change)
|
|
+ */
|
|
+#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
|
|
+#define CONFIG_KW88F6281 1 /* SOC Name */
|
|
+
|
|
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
|
|
+
|
|
+/*
|
|
+ * Misc Configuration Options
|
|
+ */
|
|
+#define CONFIG_SHOW_BOOT_PROGRESS 1 /* boot progess display (LED's) */
|
|
+
|
|
+/*
|
|
+ * Commands configuration
|
|
+ */
|
|
+#define CONFIG_PREBOOT
|
|
+
|
|
+/*
|
|
+ * mv-common.h should be defined after CMD configs since it used them
|
|
+ * to enable certain macros
|
|
+ */
|
|
+#include "mv-common.h"
|
|
+
|
|
+/*
|
|
+ * Default environment variables
|
|
+ */
|
|
+#define CONFIG_BOOTCOMMAND \
|
|
+ "ubi part ubi; " \
|
|
+ "ubi read 0x800000 kernel; " \
|
|
+ "bootm 0x800000"
|
|
+
|
|
+#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
+ "console=console=ttyS0,115200\0" \
|
|
+ "mtdids=nand0=orion_nand\0" \
|
|
+ "mtdparts="CONFIG_MTDPARTS_DEFAULT "\0" \
|
|
+ "bootargs_root=\0"
|
|
+
|
|
+/*
|
|
+ * Ethernet Driver configuration
|
|
+ */
|
|
+#ifdef CONFIG_CMD_NET
|
|
+#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
|
|
+#define CONFIG_PHY_BASE_ADR 0x1
|
|
+#define CONFIG_NETCONSOLE
|
|
+#endif /* CONFIG_CMD_NET */
|
|
+
|
|
+/*
|
|
+ * SATA Driver configuration
|
|
+ */
|
|
+#ifdef CONFIG_MVSATA_IDE
|
|
+#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
|
|
+#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
|
|
+#endif /* CONFIG_MVSATA_IDE */
|
|
+
|
|
+/*
|
|
+ * File system
|
|
+ */
|
|
+#define CONFIG_JFFS2_NAND
|
|
+#define CONFIG_JFFS2_LZO
|
|
+
|
|
+/*
|
|
+ * Date Time
|
|
+ */
|
|
+#ifdef CONFIG_CMD_DATE
|
|
+#define CONFIG_RTC_MV
|
|
+#endif /* CONFIG_CMD_DATE */
|
|
+
|
|
+#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
|
|
+
|
|
+#endif /* _CONFIG_NSA325_H */
|