Set the toolchain's ARM CPU and FPU architectures by utilizing' gcc's
--with-cpu / --with-fpu configure options that: "Specify which cpu
variant the compiler should generate code for by default. cpu will
be used as the default value of the -mcpu= switch."
This will resolve the following kernel compilation failures under
gcc 8.x on ARM because the kernel wants to set (possibly conflicting)
optimization flags.
.../ccyVnmrs.s:204: Error: selected processor does not support `dmb ish' in ARM mode
.../ccyVnmrs.s:215: Error: architectural extension `mp' is not allowed for the current base architecture
.../ccyVnmrs.s:216: Error: selected processor does not support `pldw [r4]' in ARM mode
Because this is a big change, the .config and toolchain need to be
refreshed (as in removed and regenerated).
Reported-by: Ansuel Smith <ansuelsmth@gmail.com>
Reported-by: Daniel Engberg <daniel.engberg.lists@pyret.net> [#1203]
Signed-off-by: Boris Krasnovskiy <borkra@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [extended commit message,
removed now-deprecated CPU_CFLAGS, changed author to gmail address]
This patch adds a ChromiumOS 3.18 patch [0] that fixes memory
allocation issues under memory pressure by keeping track
of missed allocs and rectify the omission at a later date.
It also adds ethtool counters for memory allocation
failures accounting so this can be verified.
[0] <d4e1e4ce68>
Reported-by: Chen Minqiang <ptpt52@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Some broken ISPs (e.g. Comcast) send DHCPv6 packets with hop limit=0.
This trips up the TTL=0 check in the PPE if enabled.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
COMFAST CF-E5/E7 is a outdoor 4G LTE AP with PoE support, based on
Qualcomm/Atheros QCA9531.
Short specification:
2x 10/100 Mbps Ethernet, with 24v PoE support
64 MB of RAM (DDR2)
16 MB of FLASH (SPI)
2T2R 2.4 GHz, 802.11b/g/n
built-in 1x 3 dBi antennas
output power (max): 80 mW (19 dBm)
Qucetel EC20 LTE MODULE(1x external detachable antenna)
Flash instruction:
Original firmware is based on OpenWrt.
Use sysupgrade image directly in vendor GUI.
Signed-off-by: Ding Tengfei <dtf@comfast.cn>
[commit subject fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit adds support for TP-Link TL-WR710N v1 router.
CPU: Atheros AR9331 400MHz
RAM: 32MB
FLASH: 8MiB
PORTS: 1 Port 100/10 LAN (connected to a switch), 1 Port 100/10 WAN
WiFi: Atheros AR9331 1x2:1 bgn
USB: ChipIdea HDRC USB2.0
LED: SYS
BTN: Reset
Sysupgrade from `ar71xx` works without glitches.
Network interfaces assigned for LAN and WAN ports are `eth1` and `eth0`
respectively, what's consistent with `ar71xx` target. Wireless radio
path is automatically upgraded from `platform/ar933x_wmac` to
`platform/ahb/18100000.wmac`.
Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
This adds support for the Chinese version of TL-WR941N v7.
It uses QCA9558+AR8236 while the international version
uses TP9343 instead.
Specification:
- SoC: Qualcomm Atheros QCA9558
- Flash: 4 MB
- RAM: 64 MB
- Ethernet: Atheros AR8236 with 5 FE ports
Flash instruction:
Upload the generated factory firmware on web interface.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This allows users to specify a shorter mib poll interval so that the
swconfig leds could behave normal with current get_port_stats()
implementation.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This applies to ar8216 and ar8236. QCA's newer U-boot will enable
the switch mdio master for FE switches which makes phy inaccessible
from CPU mdio. (e.g. on TP-Link TL-WR941N v7 Chinese version which
uses QCA9558+AR8236.) For these devices PHY probing is broken and
mdio device probing is a must. We also need to disable switch mdio
master in driver for later PHY initialization.
Do a soft reset during hw_init so that mdio master can be disabled
and expose PHYs to CPU mdio for later PHY accessing.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
ar8xxx_mib_capture will update mib counters for all ports. Current
code only update one port at a time and the data for other ports
are lost.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Partially reverts commit eff3549c58.
AR7240 and AR9341 have buggy hardware switch LED trigger. The AR7240
one doesn't blink and the blinking of port0/port5 is reversed on
AR9341 if we swap PHY0 and PHY4. (Only blinking is reversed, which
means LED for PHY0 will lit when PHY0 is link up and will blink when
PHY4 has active link and vice versa.) On these two chips a software
swconfig LED trigger is required.
This commit adds swconfig port stats back but:
1. move checking of mib_t/rxb_id into ar8xxx_chip since we can't
distinguish ar7240sw and ar8216 using only chip id.
2. don't update mib counter in get_port_stat. This function is called
every 0.01s and this capturing procedure will take up a lot of CPU.
We already have a mib_work_func updating mib counters every 2s so
return the saved counter instead of fetching new data. The blinking
rate will be weird but it should solve the previously mentioned CPU
time problem.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This builtin switch is a bugless ar8216 with different mib counters
and gigabit cpu port.
Atheros uses the same device ID and it's impossible to distinguish
the standalone one and the builtin one. So we add support to mdio
device probe only.
This switch doesn't have buggy vlan tag so it's not needed to enable
atheros header. This commit changed ar8216_setup_port so that it can
be reused for this switch.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Atheros FE switches have a builtin mdio master available for PHY
accessing and on ar724x/ar933x builtin switches this mdio master
is the only way of accessing PHYs.
After this patch if there is phy_read/phy_write method available
in ar8xxx_chip we register a separated mdio bus for accessing PHYs.
Still adds support for mdio device probing only since this isn't
needed for those switches registered using PHY probing.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
ar8229 is the builtin switch in ar934x and later chips. There is
also a standalone version available and their registers/functions
are the same.
This commit added support for the builtin ar8229. The only thing
missing for standalone ar8229 should be phy modes. Since I don't
have a router using that, this commit doesn't add support for
other phy modes.
Only add its support for mdio-device probing method because the
current PHY probing can't return 1G speed when it's a FE switch.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
ar8xxx_id_chip is used to determine current ar8xxx_chip using switch
id and this isn't needed during mdiodev probing.
Move it out of ar8xxx_probe_switch so that we can skip it.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
for mdio-device probing we still need to read chip id but ar8xxx_chip
can be determined using drvdata. We can't distinguish the buggy
standalone ar8216 and the builtin ar8216 in ar724x/ar933x using chip
id.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The following patches are dropped because they are merged upstream:
-0001-tty-serial-drop-QCA-pecific-SoC-symbols.patch
-0006-usb-drop-deprecated-symbols.patch
-0009-MIPS-ath79-add-lots-of-missing-registers.patch
-0010-MIPS-ath79-add-support-for-QCA953x-QCA956x-TP9343.patch
-0014-MIPS-ath79-finetune-cpu-overrides.patch
-0015-MIPS-ath79-enable-uart-during-early_prink.patch
-0016-MIPS-ath79-get-PCIe-controller-out-of-reset.patch
This patch is dropped due to the introduction of spi-mem framework:
-461-spi-ath79-add-fast-flash-read.patch
Thank to Michael Marley @mamarley for his work on this patch:
-910-unaligned_access_hacks.patch
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[synchronized kernel config with make kernel_oldconfig]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
linux 4.19 doesn't accept a NULL device for these functions.
It also complains that the device struct in net_device doesn't have
a dma_mask set.
Pass the device struct from platform_device for these functions.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Kernel newer than 4.15 dropped "data" field and used from_timer
to cast out the parent struct pointer for current timer.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The DIR-510L Wireless Router are based on the MT7620A SoC.
Specification:
-MediaTek MT7620A (580 Mhz)
-128 MB of RAM
-16 MB of FLASH
-802.11bgn radio
-1x 10/100 Mbps Ethernet
-2x internal, non-detachable antennas
-UART (J3) header on PCB (57600 8n1)
-1x bi-color LED (GPIO-controlled), 2x button
-JBOOT bootloader
Known issues:
-Ethernet port is used as LAN
-No communication with charger IC. (uart bitbang needed)
Installation:
Apply factory image via d-link http web-gui.
How to revert to OEM firmware:
1.) Push the reset button and turn on the power. Wait until LED start blinking (~10sec.)
2.) Upload original factory image via JBOOT http (IP: 192.168.123.254)
3.) If http doesn't work, it can be done with curl command:
curl -F FN=@XXXXX.binhttp://192.168.123.254/upg
where XXXXX.bin is name of firmware file.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
[fixed whitespace issue in 10-rt2x00-eeprom]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Some boards with JBOOT have partiton between bootloader
and kernel image. This patch add possibility to change kernel
partition start address.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
clk_get_rate returns the current clock rate in Hz for a clock source so
if we divide it by 1M, then we get frequency in MHz and not kHz.
Signed-off-by: Qin Wei <support@vocore.io>
[added missing commit message, and fixed author with SoB from PR message]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
4d8c7e8 mt76: mt76x02: send no-skb tx status without holding the status lock
7e9e9ad mt76: mt7603: add missing initialization for dev->ps_lock
3a7e6bb mt76: fix potential deadlock on cancelling workqueues
deacb8f mt76: fix using mac80211 tx skb header padding
c9402eb mt76: use napi polling for tx cleanup
60e508e mt76: use readl/writel instead of ioread32/iowrite32
5912e8a mt7603: fix sequence number assignment
95a83cc mt7603: send BAR after powersave wakeup
Signed-off-by: Felix Fietkau <nbd@nbd.name>
The PCIe DWC host controller is now using MSI
(Message-signaled-interrupts) by default.
While ath9k itself does support MSI here, a lot of wlan adapters do not.
Avoid non-functioning cards by simply continue to disable MSI for now.
This can be done by appending "pci=nomsi" to the boot cmdline.
Also an extra fix needs to be backported which avoids MSI initialization
which prevented legacy IRQ's init from taking over.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The DWC host controller symbols are now depending on a few others
Fixes: ca1b93f038 ("imx6: add support for kernel 4.19")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The NanoBeam is a small AR9342 based directional 5 GHz AC CPE with hardware
almost identical to the Ubiquiti NanoStation AC loco. Over the NanoStation
AC loco it has 5 additional LEDs. Four of those LEDs are used as rssi
indicators, the fifth LED is used as an ethernet link/activity indicator.
CPU: Atheros AR9342 SoC
RAM: 64 MB DDR2
Flash: 16 MB NOR SPI
WLAN: QCA988X
Ports: 1x GbE
Flashing procedure is identical to the NanoStation AC loco and can be performed
either via serial or the factory firmware upgrade.
Serial flashing:
1. Connect to serial header on device (8N1 115200)
2. Power on device and enter uboot console
3. Set up tftp server serving an openwrt initramfs build
4. Load initramfs build using the command tftpboot in the uboot cli
5. Boot the loaded image using the command bootm
6. Copy squashfs openwrt sysupgrade build to the booted device
7. Use mtd to write sysupgrade to partition "firmware"
8. Reboot and enjoy
Flashing through factory firmware:
1. Ensure firmware version v8.5.0.36727 is installed. Up/downgrade to this exact version.
2. Patch fwupdate.real binary using `hexdump -Cv /bin/ubntbox | sed 's/14 40 fe fe/00 00 00 00/g' | hexdump -R > /tmp/fwupdate.real`
3. Make the patched fwupdate.real binary executable using `chmod +x /tmp/fwupdate.real`
4. Copy the squashfs factory image to /tmp on the device
5. Flash OpenWRT using `/tmp/fwupdate.real -m <squashfs-factory image>`
6. Wait for the device to reboot
Thanks to @cybermaus for testing!
Tested-by: Maurits van Dueren den Hollander <cybermaus@gmail.com>
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>
The Mikrotik RouterBOARD SXT 2nD r3 is an outdoor WiFi AP / CPE
with a single 2.4 GHz radio and a 100 Mbps Ethernet port.
The device similar to the SXT 2nD r2, but it has SPI NOR flash instead
of NAND flash.
Hardware
--------
CPU: Atheros AR9344 (600 MHz)
RAM: 64 MiB
FLASH: 16 MiB SPI NOR W25Q128
ETH: 1x 100 Mbps Atheros AG71xx
WiFi: 2T2R 802.11b/g/n (ath9k)
Power: Passive PoE 8-30 V
Installation instructions:
1. Boot openwrt-ar71xx-mikrotik-vmlinux-initramfs.elf using a
DHCP+TFTP server.
2. Erase the "firmware" partition using the mtd command. This should
no longer be required once this patch is merged.
3. Use sysupgrade to install to flash. The file
openwrt-ar71xx-mikrotik-rb-nor-flash-16M-squashfs-sysupgrade.bin
should be used.
Signed-off-by: Xavier Douville <github@douville.org>
If no feed.conf or feeds.conf.default is found on image generation with
the imagebuilder we always get the following message "Unable to open
feeds configuration at <dir>/scripts/feeds line 48." on std error.
To get rid off this needless warning on image generation with the
imagebuilder supress the output in feeds.mk.
Signed-off-by: Florian Eckert <fe@dev.tdt.de>
a8cf037 netifd: wireless: Add support for GCMP cipher
34a70b6 netifd: wireless: Add support for 802.11ad
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 0331770299.
With LTO enabled valgridn does not build on MIPS32 any more, deactivate
it for now. The patch refresh was not reverted.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Openssl 1.1.0 made wholesale changes to its building system.
Apparently, parallel builds are working now.
Signed-off-by: Eneas U de Queiroz <cote2004-github@yahoo.com>
ath10k_pci driver crashes once loaded and causes boot loops on this
device as 5GHz radio QCA9880-AR1A shipped with this router is broken.
It's not possible to fix this problem in software, miniPCIe radio has to
be replaced.
We could've probably fixed crashing of the ath10k driver by reverting
following upstream commit:
commit 1a7fecb766c83dace747f42b25bbb544b00a0163
Author: Michal Kazior <michal.kazior@tieto.com>
Date: Sat Jan 24 12:14:48 2015 +0200
ath10k: reset chip before reading chip_id in probe
but it's not worth the effort as it wouldn't make that 5GHz radio usable
anyway. So it seems more convenient to just remove the crashing driver
and provide bootable images, as I believe, that a router that is working
but degraded is better than a router that will not work.
For details please see discussions in PR[1] and in FS#1743[2].
1. https://github.com/openwrt/openwrt/pull/1349
2. https://bugs.openwrt.org/index.php?do=details&task_id=1743
Signed-off-by: Aubrey McIntosh, PhD <aubrey.mcintosh@utexas.edu>
[subject and commit message tweaks]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The port labled as "LAN" is eth1.
That's different from the -lite variant,
where the only existing port eth0 is used as LAN
Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
Boris Krasnovskiy
Christian Lamparter
Deng Qingfang
Felix Fietkau
Ding Tengfei
Marcin Jurkowski
Chuanhong Guo
Pawel Dembicki
Qin Wei
Koen Vandeputte
Hans Dedecker
Tobias Schramm
Xavier Douville
Florian Eckert
Hauke Mehrtens
Rosy Song
Eneas U de Queiroz
Aubrey McIntosh, PhD
Andreas Ziegler