lantiq: set port numbers corresponding to reg value

Fix inconsistencies found in DTS files and sort ethernet ports based on
updated names.

Signed-off-by: Aleksander Jan Bajkowski <A.Bajkowski@stud.elka.pw.edu.pl>
[squash two separate patches, rephrase commit title/message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
master
Aleksander Jan Bajkowski 4 years ago committed by Adrian Schmutzler
parent 3866fefa38
commit f496939f15

@ -110,29 +110,29 @@
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&phy0>; phy-handle = <&phy0>;
}; };
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "mii";
phy-handle = <&phy13>;
};
ethernet@2 { ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <5>; reg = <2>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy14>; phy-handle = <&phy11>;
}; };
ethernet@3 { ethernet@3 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <2>; reg = <3>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy11>; phy-handle = <&phy12>;
}; };
ethernet@4 { ethernet@4 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <3>; reg = <4>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy12>; phy-handle = <&phy13>;
};
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "mii";
phy-handle = <&phy14>;
}; };
}; };

@ -105,7 +105,7 @@
phy-handle = <&phy11>; phy-handle = <&phy11>;
}; };
ethernet@3 { ethernet@4 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <4>; reg = <4>;
phy-mode = "gmii"; phy-mode = "gmii";

@ -162,29 +162,29 @@
reg = <0>; reg = <0>;
lantiq,switch; lantiq,switch;
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "mii";
phy-handle = <&phy13>;
};
ethernet@2 { ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <5>; reg = <2>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy14>; phy-handle = <&phy11>;
}; };
ethernet@3 { ethernet@3 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <2>; reg = <3>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy11>; phy-handle = <&phy12>;
}; };
ethernet@4 { ethernet@4 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <3>; reg = <4>;
phy-mode = "mii"; phy-mode = "mii";
phy-handle = <&phy12>; phy-handle = <&phy13>;
};
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "mii";
phy-handle = <&phy14>;
}; };
}; };

@ -103,17 +103,11 @@
reg = <0>; reg = <0>;
lantiq,switch; lantiq,switch;
ethernet@4 { ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <2>; reg = <0>;
phy-mode = "gmii"; phy-mode = "rgmii";
phy-handle = <&phy11>; phy-handle = <&phy0>;
}; };
ethernet@1 { ethernet@1 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
@ -121,11 +115,17 @@
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&phy1>; phy-handle = <&phy1>;
}; };
ethernet@0 { ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <0>; reg = <2>;
phy-mode = "rgmii"; phy-mode = "gmii";
phy-handle = <&phy0>; phy-handle = <&phy11>;
};
ethernet@4 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
}; };
}; };

@ -121,24 +121,24 @@
phy-handle = <&phy0>; phy-handle = <&phy0>;
// gpios = <&gpio 42 GPIO_ACTIVE_LOW>; // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
}; };
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
ethernet@2 { ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <2>; reg = <2>;
phy-mode = "gmii"; phy-mode = "gmii";
phy-handle = <&phy11>; phy-handle = <&phy11>;
}; };
ethernet@3 { ethernet@4 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <4>; reg = <4>;
phy-mode = "gmii"; phy-mode = "gmii";
phy-handle = <&phy13>; phy-handle = <&phy13>;
}; };
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
}; };
mdio { mdio {

@ -41,24 +41,24 @@
phy-handle = <&phy0>; phy-handle = <&phy0>;
// gpios = <&gpio 42 GPIO_ACTIVE_LOW>; // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
}; };
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
ethernet@2 { ethernet@2 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <2>; reg = <2>;
phy-mode = "gmii"; phy-mode = "gmii";
phy-handle = <&phy11>; phy-handle = <&phy11>;
}; };
ethernet@3 { ethernet@4 {
compatible = "lantiq,xrx200-pdi-port"; compatible = "lantiq,xrx200-pdi-port";
reg = <4>; reg = <4>;
phy-mode = "gmii"; phy-mode = "gmii";
phy-handle = <&phy13>; phy-handle = <&phy13>;
}; };
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
}; };
mdio { mdio {

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