fix up the rt2880 patches

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 36326

target/linux/ramips/patches-3.8/0107-MIPS-ralink-adds-support-for-RT2880-SoC-family.patch

@@ -1,7 +1,7 @@
-From f63a0ea6c115e7b78bce70d78aaa813615e3d434 Mon Sep 17 00:00:00 2001
+From c4429f19cc66951962c171dba90b8747f95a654e Mon Sep 17 00:00:00 2001
 From: John Crispin <blogic@openwrt.org>
 Date: Sun, 27 Jan 2013 09:17:20 +0100
-Subject: [PATCH 107/121] MIPS: ralink: adds support for RT2880 SoC family
+Subject: [PATCH V2 09/16] MIPS: ralink: adds support for RT2880 SoC family
 
 Add support code for rt2880 SOC.
 
@@ -14,22 +14,27 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  arch/mips/ralink/Kconfig                   |    3 +
  arch/mips/ralink/Makefile                  |    1 +
  arch/mips/ralink/Platform                  |    5 +
- arch/mips/ralink/rt288x.c                  |  141 ++++++++++++++++++++++++++++
+ arch/mips/ralink/rt288x.c                  |  143 ++++++++++++++++++++++++++++
- 6 files changed, 200 insertions(+), 1 deletion(-)
+ 6 files changed, 202 insertions(+), 1 deletion(-)
  create mode 100644 arch/mips/include/asm/mach-ralink/rt288x.h
  create mode 100644 arch/mips/ralink/rt288x.c
 
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
+index 27a4bfa..c1997db 100644
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -1189,7 +1189,7 @@ config BOOT_ELF32
+@@ -1144,7 +1144,7 @@ config BOOT_ELF32
  
  config MIPS_L1_CACHE_SHIFT
  	int
 -	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
-+	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL || SOC_RT288X 
++	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL || SOC_RT288X
  	default "6" if MIPS_CPU_SCACHE
  	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
  	default "5"
+diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h
+new file mode 100644
+index 0000000..ad8b42d
 --- /dev/null
 +++ b/arch/mips/include/asm/mach-ralink/rt288x.h
 @@ -0,0 +1,49 @@
@@ -82,6 +87,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +#define CLKCFG_SRAM_CS_N_WDT		BIT(9)
 +
 +#endif
+diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
+index a0b0197..6723b94 100644
 --- a/arch/mips/ralink/Kconfig
 +++ b/arch/mips/ralink/Kconfig
 @@ -6,6 +6,9 @@ choice
@@ -94,19 +101,23 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	config SOC_RT305X
  		bool "RT305x"
  		select USB_ARCH_HAS_HCD
+diff --git a/arch/mips/ralink/Makefile b/arch/mips/ralink/Makefile
+index 939757f..6d826f2 100644
 --- a/arch/mips/ralink/Makefile
 +++ b/arch/mips/ralink/Makefile
 @@ -8,6 +8,7 @@
  
- obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o
+ obj-y := prom.o of.o reset.o clk.o irq.o
  
 +obj-$(CONFIG_SOC_RT288X) += rt288x.o
  obj-$(CONFIG_SOC_RT305X) += rt305x.o
  
  obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+diff --git a/arch/mips/ralink/Platform b/arch/mips/ralink/Platform
+index 6babd65..3f49e51 100644
 --- a/arch/mips/ralink/Platform
 +++ b/arch/mips/ralink/Platform
-@@ -5,6 +5,11 @@ core-$(CONFIG_RALINK)		+= arch/mips/rali
+@@ -5,6 +5,11 @@ core-$(CONFIG_RALINK)		+= arch/mips/ralink/
  cflags-$(CONFIG_RALINK)		+= -I$(srctree)/arch/mips/include/asm/mach-ralink
  
  #
@@ -118,9 +129,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  # Ralink RT305x
  #
  load-$(CONFIG_SOC_RT305X)	+= 0xffffffff80000000
+diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
+new file mode 100644
+index 0000000..8f3a0fa
 --- /dev/null
 +++ b/arch/mips/ralink/rt288x.c
-@@ -0,0 +1,141 @@
+@@ -0,0 +1,143 @@
 +/*
 + * This program is free software; you can redistribute it and/or modify it
 + * under the terms of the GNU General Public License version 2 as published
@@ -223,15 +237,17 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	}
 +
 +	ralink_clk_add("cpu", cpu_rate);
-+	ralink_clk_add("10000100.timer", cpu_rate / 2);
++	ralink_clk_add("300100.timer", cpu_rate / 2);
-+	ralink_clk_add("10000500.uart", cpu_rate / 2);
++	ralink_clk_add("300120.watchdog", cpu_rate / 2);
-+	ralink_clk_add("10000c00.uartlite", cpu_rate / 2);
++	ralink_clk_add("300500.uart", cpu_rate / 2);
++	ralink_clk_add("300c00.uartlite", cpu_rate / 2);
++	ralink_clk_add("400000.ethernet", cpu_rate / 2);
 +}
 +
 +void __init ralink_of_remap(void)
 +{
-+	rt_sysc_membase = plat_of_remap_node("ralink,rt288x-sysc");
++	rt_sysc_membase = plat_of_remap_node("ralink,rt2880-sysc");
-+	rt_memc_membase = plat_of_remap_node("ralink,rt288x-memc");
++	rt_memc_membase = plat_of_remap_node("ralink,rt2880-memc");
 +
 +	if (!rt_sysc_membase || !rt_memc_membase)
 +		panic("Failed to remap core resources");
@@ -262,3 +278,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +		(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
 +		(id & CHIP_ID_REV_MASK));
 +}
+-- 
+1.7.10.4
+

target/linux/ramips/patches-3.8/0133-MIPS-ralink-make-early_printk-work-on-RT2880.patch

@@ -0,0 +1,31 @@
+From 3f32be8f012fb5476ea916e583e584cccc632a84 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Tue, 9 Apr 2013 18:31:15 +0200
+Subject: [PATCH V2 08/16] MIPS: ralink: make early_printk work on RT2880
+
+RT2880 has a different location for the early serial port.
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/ralink/early_printk.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c
+index c4ae47e..b46d041 100644
+--- a/arch/mips/ralink/early_printk.c
++++ b/arch/mips/ralink/early_printk.c
+@@ -11,7 +11,11 @@
+ 
+ #include <asm/addrspace.h>
+ 
++#ifdef CONFIG_SOC_RT288X
++#define EARLY_UART_BASE         0x300c00
++#else
+ #define EARLY_UART_BASE         0x10000c00
++#endif
+ 
+ #define UART_REG_RX             0x00
+ #define UART_REG_TX             0x04
+-- 
+1.7.10.4
+