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@ -10,7 +10,7 @@
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obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o
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--- /dev/null
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+++ b/arch/mips/pci/pci-ar2315.c
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@@ -0,0 +1,447 @@
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@@ -0,0 +1,428 @@
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+/*
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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@ -378,7 +378,6 @@
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+static int ar2315_pci_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ u32 reg;
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+ int res;
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+
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+ /* Remap PCI config space */
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@ -389,24 +388,6 @@
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+ return -ENOMEM;
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+ }
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+
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+ /* Reset PCI DMA logic */
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+ reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
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+ msleep(20);
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+ reg &= ~AR2315_RESET_PCIDMA;
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+ ar231x_write_reg(AR2315_RESET, reg);
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+ msleep(20);
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+
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+ ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
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+ AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
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+
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+ ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
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+ (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
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+ ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
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+ ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
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+ AR2315_IF_PCI | AR2315_IF_PCI_HOST |
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+ AR2315_IF_PCI_INTR | (AR2315_IF_PCI_CLK_OUTPUT_CLK <<
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+ AR2315_IF_PCI_CLK_SHIFT));
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+
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+ /* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
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+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
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+ AR2315_PCIRST_LOW);
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@ -484,13 +465,34 @@
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else if (pending & CAUSEF_IP2)
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do_IRQ(AR2315_IRQ_MISC_INTRS);
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else if (pending & CAUSEF_IP7)
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@@ -427,4 +431,10 @@ void __init ar2315_arch_init(void)
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@@ -427,4 +431,31 @@ void __init ar2315_arch_init(void)
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{
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ath25_serial_setup(AR2315_UART0, AR2315_MISC_IRQ_UART0,
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ar2315_apb_frequency());
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+
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+#ifdef CONFIG_PCI_AR2315
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+ if (ath25_soc == ATH25_SOC_AR2315) {
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+ /* Reset PCI DMA logic */
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+ ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
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+ msleep(20);
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+ ar231x_mask_reg(AR2315_RESET, AR2315_RESET_PCIDMA, 0);
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+ msleep(20);
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+
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+ /* Configure endians */
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+ ar231x_mask_reg(AR2315_ENDIAN_CTL, 0, AR2315_CONFIG_PCIAHB |
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+ AR2315_CONFIG_PCIAHB_BRIDGE);
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+
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+ /* Configure as PCI host with DMA */
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+ ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
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+ (AR2315_PCICLK_IN_FREQ_DIV_6 <<
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+ AR2315_PCICLK_DIV_S));
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+ ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
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+ ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK |
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+ AR2315_IF_MASK, AR2315_IF_PCI |
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+ AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
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+ (AR2315_IF_PCI_CLK_OUTPUT_CLK <<
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+ AR2315_IF_PCI_CLK_SHIFT));
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+
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+ platform_device_register_simple("ar2315-pci", -1, NULL, 0);
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+ }
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+#endif
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