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96 lines
3.7 KiB
Diff
96 lines
3.7 KiB
Diff
From d30840e2b1cf79d90392e6051b0c0b6006d29d8b Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Thu, 9 Mar 2017 09:32:40 +0100
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Subject: [PATCH 64/69] clk: clk-rpm fixes
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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.../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
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drivers/clk/qcom/clk-rpm.c | 35 ++++++++++++++++++++++
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include/dt-bindings/clock/qcom,rpmcc.h | 4 +++
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3 files changed, 40 insertions(+)
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--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
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+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
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@@ -16,6 +16,7 @@ Required properties :
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"qcom,rpmcc-msm8974", "qcom,rpmcc"
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"qcom,rpmcc-apq8064", "qcom,rpmcc"
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"qcom,rpmcc-msm8996", "qcom,rpmcc"
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+ "qcom,rpmcc-ipq806x", "qcom,rpmcc"
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"qcom,rpmcc-msm8998", "qcom,rpmcc"
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"qcom,rpmcc-qcs404", "qcom,rpmcc"
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--- a/include/dt-bindings/clock/qcom,rpmcc.h
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+++ b/include/dt-bindings/clock/qcom,rpmcc.h
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@@ -37,6 +37,10 @@
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#define RPM_XO_A0 27
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#define RPM_XO_A1 28
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#define RPM_XO_A2 29
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+#define RPM_NSS_FABRIC_0_CLK 30
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+#define RPM_NSS_FABRIC_0_A_CLK 31
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+#define RPM_NSS_FABRIC_1_CLK 32
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+#define RPM_NSS_FABRIC_1_A_CLK 33
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/* SMD RPM clocks */
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#define RPM_SMD_XO_CLK_SRC 0
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--- a/drivers/clk/qcom/clk-rpm.c
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+++ b/drivers/clk/qcom/clk-rpm.c
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@@ -512,6 +512,16 @@ DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a0_
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DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a1_clk, xo_a1_a_clk, 24);
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DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a2_clk, xo_a2_a_clk, 28);
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+/* ipq806x */
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+DEFINE_CLK_RPM(ipq806x, afab_clk, afab_a_clk, QCOM_RPM_APPS_FABRIC_CLK);
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+DEFINE_CLK_RPM(ipq806x, cfpb_clk, cfpb_a_clk, QCOM_RPM_CFPB_CLK);
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+DEFINE_CLK_RPM(ipq806x, daytona_clk, daytona_a_clk, QCOM_RPM_DAYTONA_FABRIC_CLK);
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+DEFINE_CLK_RPM(ipq806x, ebi1_clk, ebi1_a_clk, QCOM_RPM_EBI1_CLK);
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+DEFINE_CLK_RPM(ipq806x, sfab_clk, sfab_a_clk, QCOM_RPM_SYS_FABRIC_CLK);
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+DEFINE_CLK_RPM(ipq806x, sfpb_clk, sfpb_a_clk, QCOM_RPM_SFPB_CLK);
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+DEFINE_CLK_RPM(ipq806x, nss_fabric_0_clk, nss_fabric_0_a_clk, QCOM_RPM_NSS_FABRIC_0_CLK);
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+DEFINE_CLK_RPM(ipq806x, nss_fabric_1_clk, nss_fabric_1_a_clk, QCOM_RPM_NSS_FABRIC_1_CLK);
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+
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static struct clk_rpm *apq8064_clks[] = {
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[RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk,
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[RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk,
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@@ -538,15 +548,40 @@ static struct clk_rpm *apq8064_clks[] =
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[RPM_XO_A2] = &apq8064_xo_a2_clk,
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};
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+static struct clk_rpm *ipq806x_clks[] = {
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+ [RPM_APPS_FABRIC_CLK] = &ipq806x_afab_clk,
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+ [RPM_APPS_FABRIC_A_CLK] = &ipq806x_afab_a_clk,
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+ [RPM_CFPB_CLK] = &ipq806x_cfpb_clk,
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+ [RPM_CFPB_A_CLK] = &ipq806x_cfpb_a_clk,
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+ [RPM_DAYTONA_FABRIC_CLK] = &ipq806x_daytona_clk,
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+ [RPM_DAYTONA_FABRIC_A_CLK] = &ipq806x_daytona_a_clk,
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+ [RPM_EBI1_CLK] = &ipq806x_ebi1_clk,
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+ [RPM_EBI1_A_CLK] = &ipq806x_ebi1_a_clk,
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+ [RPM_SYS_FABRIC_CLK] = &ipq806x_sfab_clk,
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+ [RPM_SYS_FABRIC_A_CLK] = &ipq806x_sfab_a_clk,
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+ [RPM_SFPB_CLK] = &ipq806x_sfpb_clk,
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+ [RPM_SFPB_A_CLK] = &ipq806x_sfpb_a_clk,
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+ [RPM_NSS_FABRIC_0_CLK] = &ipq806x_nss_fabric_0_clk,
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+ [RPM_NSS_FABRIC_0_A_CLK] = &ipq806x_nss_fabric_0_a_clk,
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+ [RPM_NSS_FABRIC_1_CLK] = &ipq806x_nss_fabric_1_clk,
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+ [RPM_NSS_FABRIC_1_A_CLK] = &ipq806x_nss_fabric_1_a_clk,
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+};
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+
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static const struct rpm_clk_desc rpm_clk_apq8064 = {
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.clks = apq8064_clks,
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.num_clks = ARRAY_SIZE(apq8064_clks),
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};
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+static const struct rpm_clk_desc rpm_clk_ipq806x = {
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+ .clks = ipq806x_clks,
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+ .num_clks = ARRAY_SIZE(ipq806x_clks),
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+};
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+
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static const struct of_device_id rpm_clk_match_table[] = {
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{ .compatible = "qcom,rpmcc-msm8660", .data = &rpm_clk_msm8660 },
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{ .compatible = "qcom,rpmcc-apq8060", .data = &rpm_clk_msm8660 },
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{ .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 },
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+ { .compatible = "qcom,rpmcc-ipq806x", .data = &rpm_clk_ipq806x },
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{ }
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};
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MODULE_DEVICE_TABLE(of, rpm_clk_match_table);
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