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135 lines
3.9 KiB
Diff
135 lines
3.9 KiB
Diff
From 3ddc3564d3c9f097986bd4ccbe34152413811335 Mon Sep 17 00:00:00 2001
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From: Stephen Boyd <sboyd@codeaurora.org>
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Date: Tue, 14 Aug 2018 17:42:27 +0530
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Subject: [PATCH 08/12] clk: qcom: Add KPSS ACC/GCC driver
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The ACC and GCC regions present in KPSSv1 contain registers to
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control clocks and power to each Krait CPU and L2. For CPUfreq
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purposes probe these devices and expose a mux clock that chooses
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between PXO and PLL8.
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Cc: <devicetree@vger.kernel.org>
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Tested-by: Craig Tatlor <ctatlor97@gmail.com>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/qcom/Kconfig | 8 ++++
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drivers/clk/qcom/Makefile | 1 +
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drivers/clk/qcom/kpss-xcc.c | 87 +++++++++++++++++++++++++++++++++++++
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3 files changed, 96 insertions(+)
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create mode 100644 drivers/clk/qcom/kpss-xcc.c
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--- a/drivers/clk/qcom/Kconfig
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+++ b/drivers/clk/qcom/Kconfig
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@@ -284,3 +284,11 @@ config QCOM_HFPLL
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Support for the high-frequency PLLs present on Qualcomm devices.
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Say Y if you want to support CPU frequency scaling on devices
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such as MSM8974, APQ8084, etc.
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+
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+config KPSS_XCC
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+ tristate "KPSS Clock Controller"
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+ depends on COMMON_CLK_QCOM
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+ help
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+ Support for the Krait ACC and GCC clock controllers. Say Y
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+ if you want to support CPU frequency scaling on devices such
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+ as MSM8960, APQ8064, etc.
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--- a/drivers/clk/qcom/Makefile
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+++ b/drivers/clk/qcom/Makefile
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@@ -45,4 +45,5 @@ obj-$(CONFIG_SDM_DISPCC_845) += dispcc-s
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obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o
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obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
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obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
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+obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
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obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
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--- /dev/null
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+++ b/drivers/clk/qcom/kpss-xcc.c
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@@ -0,0 +1,87 @@
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+// SPDX-License-Identifier: GPL-2.0
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+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/of.h>
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+#include <linux/of_device.h>
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+#include <linux/clk.h>
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+#include <linux/clk-provider.h>
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+
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+static const char *aux_parents[] = {
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+ "pll8_vote",
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+ "pxo",
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+};
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+
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+static unsigned int aux_parent_map[] = {
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+ 3,
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+ 0,
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+};
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+
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+static const struct of_device_id kpss_xcc_match_table[] = {
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+ { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
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+ { .compatible = "qcom,kpss-gcc" },
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
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+
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+static int kpss_xcc_driver_probe(struct platform_device *pdev)
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+{
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+ const struct of_device_id *id;
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+ struct clk *clk;
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+ struct resource *res;
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+ void __iomem *base;
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+ const char *name;
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+
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+ id = of_match_device(kpss_xcc_match_table, &pdev->dev);
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+ if (!id)
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+ return -ENODEV;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ if (id->data) {
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+ if (of_property_read_string_index(pdev->dev.of_node,
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+ "clock-output-names",
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+ 0, &name))
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+ return -ENODEV;
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+ base += 0x14;
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+ } else {
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+ name = "acpu_l2_aux";
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+ base += 0x28;
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+ }
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+
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+ clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
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+ ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
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+ 0, aux_parent_map, NULL);
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+
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+ platform_set_drvdata(pdev, clk);
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+
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+ return PTR_ERR_OR_ZERO(clk);
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+}
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+
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+static int kpss_xcc_driver_remove(struct platform_device *pdev)
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+{
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+ clk_unregister_mux(platform_get_drvdata(pdev));
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+ return 0;
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+}
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+
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+static struct platform_driver kpss_xcc_driver = {
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+ .probe = kpss_xcc_driver_probe,
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+ .remove = kpss_xcc_driver_remove,
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+ .driver = {
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+ .name = "kpss-xcc",
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+ .of_match_table = kpss_xcc_match_table,
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+ },
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+};
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+module_platform_driver(kpss_xcc_driver);
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+
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+MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver");
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+MODULE_LICENSE("GPL v2");
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+MODULE_ALIAS("platform:kpss-xcc");
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