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50 lines
1.3 KiB
Diff
50 lines
1.3 KiB
Diff
--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -49,6 +49,8 @@ void ath79_ddr_ctrl_init(void)
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if (soc_is_ar913x() || soc_is_ar724x() || soc_is_ar933x()) {
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ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c;
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ath79_ddr_pci_win_base = 0;
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+ } else if (soc_is_qca953x() || soc_is_qca955x()) {
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+ ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c;
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} else {
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ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c;
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ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c;
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--- a/arch/mips/ath79/irq.c
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+++ b/arch/mips/ath79/irq.c
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@@ -105,12 +105,12 @@ static void qca955x_ip2_irq_dispatch(str
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}
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if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
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- /* TODO: flush DDR? */
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+ ath79_ddr_wb_flush(3);
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generic_handle_irq(ATH79_IP2_IRQ(0));
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}
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if (status & QCA955X_EXT_INT_WMAC_ALL) {
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- /* TODO: flush DDR? */
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+ ath79_ddr_wb_flush(4);
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generic_handle_irq(ATH79_IP2_IRQ(1));
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}
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}
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@@ -130,17 +130,17 @@ static void qca955x_ip3_irq_dispatch(str
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}
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if (status & QCA955X_EXT_INT_USB1) {
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- /* TODO: flush DDR? */
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+ ath79_ddr_wb_flush(2);
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generic_handle_irq(ATH79_IP3_IRQ(0));
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}
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if (status & QCA955X_EXT_INT_USB2) {
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- /* TODO: flush DDR? */
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+ ath79_ddr_wb_flush(2);
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generic_handle_irq(ATH79_IP3_IRQ(1));
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}
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if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) {
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- /* TODO: flush DDR? */
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+ ath79_ddr_wb_flush(3);
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generic_handle_irq(ATH79_IP3_IRQ(2));
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}
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}
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