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809 lines
18 KiB
Diff
809 lines
18 KiB
Diff
From ce57fc22543d0ee0ca33157264815a52fc8cf9a3 Mon Sep 17 00:00:00 2001
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From: Kurt Mahan <kmahan@freescale.com>
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Date: Thu, 15 May 2008 13:23:27 -0600
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Subject: [PATCH] Add I2C bus driver for MCF547x and MCF548x.
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LTIBName: m547x-8x-i2c
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Signed-off-by: Kurt Mahan <kmahan@freescale.com>
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Signed-off-by: Shrek Wu <b16972@freescale.com>
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---
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arch/m68k/coldfire/Makefile | 1 +
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arch/m68k/coldfire/mcf548x-devices.c | 94 ++++++
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drivers/i2c/busses/Kconfig | 12 +
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drivers/i2c/busses/Makefile | 1 +
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drivers/i2c/busses/i2c-algo-mcf.h | 23 ++
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drivers/i2c/busses/i2c-mcf548x.c | 573 ++++++++++++++++++++++++++++++++++
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include/asm-m68k/m5485i2c.h | 45 +++
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7 files changed, 749 insertions(+), 0 deletions(-)
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create mode 100644 arch/m68k/coldfire/mcf548x-devices.c
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create mode 100644 drivers/i2c/busses/i2c-algo-mcf.h
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create mode 100644 drivers/i2c/busses/i2c-mcf548x.c
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create mode 100644 include/asm-m68k/m5485i2c.h
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--- a/arch/m68k/coldfire/Makefile
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+++ b/arch/m68k/coldfire/Makefile
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@@ -11,4 +11,5 @@ endif
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obj-$(CONFIG_PCI) += pci.o mcf5445x-pci.o iomap.o
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obj-$(CONFIG_M54455) += mcf5445x-devices.o
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obj-$(CONFIG_M547X_8X) += m547x_8x-devices.o
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+obj-$(CONFIG_M547X_8X) += mcf548x-devices.o
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obj-$(CONFIG_MCD_DMA) += m547x_8x-dma.o
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--- /dev/null
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+++ b/arch/m68k/coldfire/mcf548x-devices.c
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@@ -0,0 +1,94 @@
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+/*
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+ * arch/m68k/coldfire/mcf5445x-devices.c
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+ *
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+ * Coldfire M5445x Platform Device Configuration
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+ *
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+ * Based on the Freescale MXC devices.c
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+ *
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+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
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+ * Kurt Mahan <kmahan@freescale.com>
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+ */
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/mtd/physmap.h>
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+#include <linux/platform_device.h>
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+#include <linux/fsl_devices.h>
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+
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+#include <asm/coldfire.h>
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+#include <asm/mcfsim.h>
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+
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+static struct resource coldfire_i2c_resources[] = {
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+ [0] = { /* I/O */
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+ .start = MCF_MBAR + 0x008F00,
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+ .end = MCF_MBAR + 0x008F20,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [2] = { /* IRQ */
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+ .start = 40,
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+ .end = 40,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device coldfire_i2c_device = {
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+ .name = "MCF548X-i2c",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(coldfire_i2c_resources),
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+ .resource = coldfire_i2c_resources,
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+};
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+
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+static struct resource coldfire_sec_resources[] = {
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+ [0] = { /* I/O */
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+ .start = MCF_MBAR + 0x00020000,
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+ .end = MCF_MBAR + 0x00033000,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [2] = { /* IRQ */
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+ .start = ISC_SEC,
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+ .end = ISC_SEC,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device coldfire_sec_device = {
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+ .name = "fsl-sec1",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(coldfire_sec_resources),
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+ .resource = coldfire_sec_resources,
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+};
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+
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+#if defined(CONFIG_MTD_PHYSMAP)
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+static struct physmap_flash_data mcf5485_flash_data = {
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+ .width = 2,
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+};
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+
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+static struct resource mcf5485_flash_resource = {
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+ .start = 0xf8000000,
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+ .end = 0xf80fffff,
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct platform_device mcf5485_flash_device = {
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+ .name = "physmap-flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &mcf5485_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &mcf5485_flash_resource,
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+};
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+#endif
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+
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+static int __init mcf5485_init_devices(void)
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+{
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+ printk(KERN_INFO "MCF5485x INIT_DEVICES\n");
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+
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+ platform_device_register(&coldfire_i2c_device);
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+ platform_device_register(&coldfire_sec_device);
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+/*#if defined(CONFIG_MTD_PHYSMAP)
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+ platform_device_register(&mcf5485_flash_device);
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+#endif*/
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+ return 0;
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+}
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+arch_initcall(mcf5485_init_devices);
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--- a/drivers/i2c/busses/Kconfig
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+++ b/drivers/i2c/busses/Kconfig
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@@ -4,6 +4,18 @@
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menu "I2C Hardware Bus support"
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+config I2C_MCF548x
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+ tristate "I2C MCF547x/548x interfaces"
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+ depends on I2C
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+ help
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+ This allows you to use the I2C adapters found on the Freescale
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+ MCF547x/548x microcontrollers.
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+ Say Y if you own an I2C adapter belonging to this class and then say
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+ Y to the specific driver for you adapter below.
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+
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+ This support is also available as a module. If so, the module
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+ will be called i2c-algo-mcf.
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+
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config I2C_ALI1535
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tristate "ALI 1535"
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depends on PCI
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--- a/drivers/i2c/busses/Makefile
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+++ b/drivers/i2c/busses/Makefile
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@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
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obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
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obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
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obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
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+obj-$(CONFIG_I2C_MCF548x) += i2c-mcf548x.o
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ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
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EXTRA_CFLAGS += -DDEBUG
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--- /dev/null
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+++ b/drivers/i2c/busses/i2c-algo-mcf.h
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@@ -0,0 +1,23 @@
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+#ifndef I2C_ALGO_MCF_H
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+#define I2C_ALGO_MCF_H 1
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+
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+/* --- Defines for pcf-adapters --------------------------------------- */
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+#include <linux/i2c.h>
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+
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+struct i2c_algo_mcf_data {
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+ void *data; /* private data for lolevel routines */
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+ void (*setmcf) (void *data, int ctl, int val);
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+ int (*getmcf) (void *data, int ctl);
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+ int (*getown) (void *data);
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+ int (*getclock) (void *data);
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+ void (*waitforpin) (void);
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+ /* local settings */
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+ int udelay;
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+ int mdelay;
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+ int timeout;
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+};
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+
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+int i2c_mcf_add_bus(struct i2c_adapter *);
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+int i2c_mcf_del_bus(struct i2c_adapter *);
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+
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+#endif /* I2C_ALGO_MCF_H */
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--- /dev/null
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+++ b/drivers/i2c/busses/i2c-mcf548x.c
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@@ -0,0 +1,573 @@
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+/*
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+ * Performance and stability improvements: (C) Copyright 2008,
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+ * Adrian Cox <adrian@humboldt.co.uk>
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+ * ColdFire 547x/548x I2C master support
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+ * Shrek Wu (b16972@freescale.com )moved the code driver/i2c/alg/mcf.c
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+ * into driver/i2c/busses.And changed the driver to a platform driver.
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+ */
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+#include <linux/i2c.h>
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+#include "i2c-algo-mcf.h"
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+
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/delay.h>
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+#include <linux/platform_device.h>
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+#include <linux/sched.h>
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+#include <linux/interrupt.h>
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+#include <asm/io.h>
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+
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+#include <asm/coldfire.h>
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+#include <asm/m5485sim.h>
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+#include <asm/m5485i2c.h>
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+
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+#define get_clock(adap) (clock)
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+#define get_own(adap) (own)
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+
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+static int clock = 0x3b; /*50000 / 1024 ~ 49 KHz*/
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+module_param(clock, int, 0);
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+MODULE_PARM_DESC(clock,
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+ "Set I2C clock in kHz: 400=fast mode (default == 49khz)");
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+
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+static int own = 0x78;
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+module_param(own, int, 0);
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+MODULE_PARM_DESC(clock, "Set I2C Master controller address(0x78)");
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+
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+static struct i2c_algo_mcf_data i2c_mcf_board_data = {
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+ .timeout = 10000,
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+};
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+
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+static struct i2c_adapter i2c_mcf_board_adapter = {
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+ .owner = THIS_MODULE,
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+ .name = "MCF5485 adapter",
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+ .id = I2C_HW_MPC107,
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+ .algo_data = &i2c_mcf_board_data,
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+ .class = I2C_CLASS_HWMON,
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+ .timeout = 1,
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+ .retries = 1
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+};
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+/*
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+ * static void i2c_start()
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+ *
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+ * Generates START signal
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+ */
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+static void
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+i2c_start(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ MCF_I2CR |= MCF_I2CR_MSTA;
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+}
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+
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+
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+/*
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+ * static void i2c_stop()
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+ *
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+ * Generates STOP signal
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+ */
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+static void
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+i2c_stop(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ MCF_I2CR &= ~MCF_I2CR_MSTA;
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+}
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+
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+static int
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+i2c_getack(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ return !(MCF_I2SR & MCF_I2SR_RXAK);
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+}
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+
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+/*
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+ * static void i2c_repstart()
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+ *
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+ * Generates repeated start signal (without STOP while mastering the bus)
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+ */
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+static void
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+i2c_repstart(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ MCF_I2CR |= MCF_I2CR_RSTA;
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+ MCF_I2CR |= MCF_I2CR_MTX;
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+}
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+
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+
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+/*
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+ * static void wait_for_bb()
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+ *
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+ * Wait for bus idle state
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+ */
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+static int
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+wait_for_bb(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ int i;
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+ for (i = 0; i < adap->timeout; i++) {
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+ if (!(MCF_I2SR & MCF_I2SR_IBB))
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+ return 0;
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+ udelay(10);
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+ }
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+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
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+ return -ETIMEDOUT;
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+}
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+
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+/*
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+ * static void wait_for_not_bb()
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+ *
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+ * Wait for bus busy state
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+ */
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+static int
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+wait_for_not_bb(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ int i;
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+ for (i = 0; i < adap->timeout; i++) {
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+ if (MCF_I2SR & MCF_I2SR_IBB)
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+ return 0;
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+ udelay(10);
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+ }
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+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
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+ return -ETIMEDOUT;
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+}
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+
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+/*
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+ * static void wait_xfer_done()
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+ *
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+ * Wait for transfer to complete
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+ */
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+static int
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+wait_xfer_done(
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+ struct i2c_algo_mcf_data *adap
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+) {
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+ int i;
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+
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+ for (i = 0; i < adap->timeout; i++) {
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+ if (MCF_I2SR & MCF_I2SR_IIF) {
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+ MCF_I2SR &= ~MCF_I2SR_IIF;
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+ return 0;
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+ }
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+ udelay(1);
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+ }
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+ printk(KERN_ERR "%s: timeout", __FUNCTION__);
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+ return -ETIMEDOUT;
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+}
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+
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+
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+/*
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+ * static void i2c_set_addr()
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+ *
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+ * Sets slave address to communicate
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+ */
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+static int
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+i2c_set_addr(
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+ struct i2c_algo_mcf_data *adap,
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+ struct i2c_msg *msg,
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+ int retries
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+) {
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+ unsigned short flags = msg->flags;
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+ unsigned char addr;
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+
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+ if ((flags & I2C_M_TEN)) {
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+ /* 10 bit address not supported yet */
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+ return -EIO;
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+ } else {
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+ /* normal 7bit address */
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+ addr = (msg->addr << 1);
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+ if (flags & I2C_M_RD)
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+ addr |= 1;
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+ if (flags & I2C_M_REV_DIR_ADDR)
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+ addr ^= 1;
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+
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+ MCF_I2DR = addr;
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+ }
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+ return 0;
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+}
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+
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+
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+/*
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+ * static void mcf_i2c_init()
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+ *
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+ * Perform ColdFire i2c initialization
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+ */
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+static void
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+mcf_i2c_init(struct i2c_algo_mcf_data *adap)
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+{
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+ u8 dummy;
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+ /* Setup GPIO lines */
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+ MCF_PAR_FECI2CIRQ |= MCF_PAR_SDA;
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+ MCF_PAR_FECI2CIRQ |= MCF_PAR_SCL;
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+
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+ /* Ensure slaves are in idle state */
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+ if (MCF_I2SR & MCF_I2SR_IBB) {
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+ MCF_I2ICR = 0x00;
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+ MCF_I2CR = 0x00;
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+ MCF_I2CR = 0x0A;
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+ dummy = MCF_I2DR;
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+ MCF_I2SR = 0x00;
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+ MCF_I2CR = 0x00;
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+ MCF_I2ICR = 0x01;
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+ }
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+
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+ /* setup SCL clock */
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+ MCF_I2FDR = get_clock(adap);
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+
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+ /* set slave address */
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+ MCF_I2AR = get_own(adap);
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+
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+ /* enable I2C module */
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+ MCF_I2CR = MCF_I2CR_IEN;
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+}
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+
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+static int i2c_outb(
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+ struct i2c_adapter *i2c_adap,
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+ char c
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+) {
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+
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+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
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+ int timeout;
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+ /* Put data to be sent */
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+ MCF_I2DR = c;
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+ /* Wait for xfer completed*/
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+ timeout = wait_xfer_done(adap);
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+ if (timeout) {
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+ i2c_stop(adap);
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+ wait_for_bb(adap);
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+ printk(KERN_ERR "i2c-algo-mcf: %s i2c_write: "
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+ "error - timeout.\n", i2c_adap->name);
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+ return -EREMOTEIO; /* got a better one ?? */
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+ }
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+
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+ return 0;
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+}
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+
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+
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+/*
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+ * static void mcf_sendbytes()
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+ *
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+ * Perform tx data transfer
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+ */
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+static int
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+mcf_sendbytes(
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+ struct i2c_adapter *i2c_adap,
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+ const char *buf,
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+ int count, int last
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+) {
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+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
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+ int ret, i;
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+
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+ /* Set master TX mode */
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+ MCF_I2CR |= MCF_I2CR_MTX;
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+
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+ for (i = 0; i < count; ++i) {
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+ printk(KERN_DEBUG "i2c-algo-mcf: %s i2c_write: writing %2.2X\n",
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+ i2c_adap->name, buf[i]&0xff);
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+ ret = i2c_outb(i2c_adap, buf[i]);
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+ if (ret < 0)
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+ return ret;
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+ }
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+ if (last) {
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+ i2c_stop(adap);
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+ wait_for_bb(adap);
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+ } else {
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+ i2c_repstart(adap);
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+ }
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+
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+ return (i);
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+}
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+
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+
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+/*
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+ * static void mcf_readbytes()
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+ *
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+ * Perform rx data transfer
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+ */
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+static int
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+mcf_readbytes(
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+ struct i2c_adapter *i2c_adap,
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+ char *buf,
|
|
+ int count, int last
|
|
+) {
|
|
+ int i;
|
|
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
|
|
+ u8 dummy;
|
|
+
|
|
+ /* Set master RX mode */
|
|
+ MCF_I2CR &= ~MCF_I2CR_MTX;
|
|
+ MCF_I2CR &= ~MCF_I2CR_TXAK;
|
|
+ dummy = MCF_I2DR;
|
|
+
|
|
+ for (i = 0; i < count-1; i++) {
|
|
+ if (wait_xfer_done(adap)) {
|
|
+ i2c_stop(adap);
|
|
+ wait_for_bb(adap);
|
|
+ printk(KERN_DEBUG
|
|
+ "i2c-algo-mcf: mcf_readbytes timed out.\n");
|
|
+ return (-1);
|
|
+ }
|
|
+
|
|
+ /* store next data byte */
|
|
+ buf[i] = MCF_I2DR;
|
|
+ }
|
|
+
|
|
+ if (wait_xfer_done(adap)) {
|
|
+ i2c_stop(adap);
|
|
+ wait_for_bb(adap);
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: mcf_readbytes timed out.\n");
|
|
+ return (-1);
|
|
+ }
|
|
+
|
|
+ /* Disable acknowlege (set I2CR.TXAK) */
|
|
+ MCF_I2CR |= MCF_I2CR_TXAK;
|
|
+ buf[i] = MCF_I2DR;
|
|
+ if (wait_xfer_done(adap)) {
|
|
+ i2c_stop(adap);
|
|
+ wait_for_bb(adap);
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: mcf_readbytes timed out.\n");
|
|
+ return (-1);
|
|
+ }
|
|
+
|
|
+ if (last) {
|
|
+ i2c_stop(adap);
|
|
+ wait_for_bb(adap);
|
|
+ } else {
|
|
+ i2c_repstart(adap);
|
|
+ }
|
|
+
|
|
+ return (i+1);
|
|
+}
|
|
+
|
|
+
|
|
+/*
|
|
+ * static void mcf_xfer()
|
|
+ *
|
|
+ * Perform master data I/O transfer
|
|
+ */
|
|
+static int
|
|
+mcf_xfer(
|
|
+ struct i2c_adapter *i2c_adap,
|
|
+ struct i2c_msg *msgs,
|
|
+ int num
|
|
+) {
|
|
+ struct i2c_algo_mcf_data *adap = i2c_adap->algo_data;
|
|
+ struct i2c_msg *pmsg;
|
|
+ int i;
|
|
+ int ret = 0, timeout;
|
|
+
|
|
+ /* Skip own address */
|
|
+ if (get_own(adap) == (msgs[0].addr << 1))
|
|
+ return -EIO;
|
|
+
|
|
+ /* Ensure slaves are in idle state */
|
|
+ if (MCF_I2SR & MCF_I2SR_IBB) {
|
|
+ MCF_I2ICR = 0x00;
|
|
+ MCF_I2CR = 0x00;
|
|
+ MCF_I2CR = 0x0A;
|
|
+ timeout = MCF_I2DR;
|
|
+ MCF_I2SR = 0x00;
|
|
+ MCF_I2CR = 0x00;
|
|
+ MCF_I2ICR = 0x01;
|
|
+ }
|
|
+ /* setup SCL clock */
|
|
+ MCF_I2FDR = get_clock(adap);
|
|
+ /* set slave address */
|
|
+ MCF_I2AR = get_own(adap);
|
|
+ /* enable I2C module */
|
|
+ MCF_I2CR = MCF_I2CR_IEN;
|
|
+
|
|
+ MCF_I2CR |= MCF_I2CR_TXAK;
|
|
+
|
|
+ /* Check for bus busy */
|
|
+ wait_for_bb(adap);
|
|
+
|
|
+ for (i = 0; ret >= 0 && i < num; i++) {
|
|
+ pmsg = &msgs[i];
|
|
+
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: Doing %s %d bytes "
|
|
+ "to 0x%02x - %d of %d messages\n",
|
|
+ pmsg->flags & I2C_M_RD ? "read" : "write",
|
|
+ pmsg->len, pmsg->addr, i + 1, num);
|
|
+
|
|
+ /* Send START */
|
|
+ if (i == 0)
|
|
+ i2c_start(adap);
|
|
+
|
|
+ /* Wait for Bus Busy */
|
|
+ wait_for_not_bb(adap);
|
|
+
|
|
+ MCF_I2CR |= MCF_I2CR_MTX;
|
|
+
|
|
+ ret = i2c_set_addr(adap, pmsg, i2c_adap->retries);
|
|
+ if (ret < 0)
|
|
+ return ret;
|
|
+
|
|
+ /* Wait for address transfer completion */
|
|
+ wait_xfer_done(adap);
|
|
+
|
|
+ /* Check for ACK */
|
|
+ if (!i2c_getack(adap)) {
|
|
+ i2c_stop(adap);
|
|
+ wait_for_bb(adap);
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: No ack after "
|
|
+ "send address in mcf_xfer\n");
|
|
+ return (-EREMOTEIO);
|
|
+ }
|
|
+
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: Msg %d, "
|
|
+ "addr = 0x%x, flags = 0x%x, len = %d\n",
|
|
+ i, msgs[i].addr, msgs[i].flags, msgs[i].len);
|
|
+ /* Read */
|
|
+ if (pmsg->flags & I2C_M_RD) {
|
|
+ /* read bytes into buffer*/
|
|
+ ret = mcf_readbytes(i2c_adap, pmsg->buf, pmsg->len,
|
|
+ (i + 1 == num));
|
|
+
|
|
+ if (ret != pmsg->len) {
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: fail: "
|
|
+ "only read %d bytes.\n", ret);
|
|
+ } else {
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: "
|
|
+ "read %d bytes.\n", ret);
|
|
+ }
|
|
+ } else {
|
|
+ /* write bytes into buffer*/
|
|
+ ret = mcf_sendbytes(i2c_adap, pmsg->buf, pmsg->len,
|
|
+ (i + 1 == num));
|
|
+ if (ret != pmsg->len) {
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: fail: "
|
|
+ "only wrote %d bytes.\n", ret);
|
|
+ } else {
|
|
+ printk(KERN_DEBUG "i2c-algo-mcf: wrote"
|
|
+ "%d bytes.\n", ret);
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+
|
|
+ /* Disable I2C module */
|
|
+ MCF_I2CR = 0;
|
|
+ return (i);
|
|
+}
|
|
+
|
|
+
|
|
+/*
|
|
+ * static void mcf_func()
|
|
+ *
|
|
+ * Return algorithm funtionality
|
|
+ */
|
|
+static u32
|
|
+mcf_func(
|
|
+ struct i2c_adapter *i2c_adap
|
|
+) {
|
|
+ return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
|
|
+}
|
|
+
|
|
+/*
|
|
+ * ColdFire bus algorithm callbacks
|
|
+ */
|
|
+static struct i2c_algorithm mcf_algo = {
|
|
+ .master_xfer = mcf_xfer,
|
|
+ .functionality = mcf_func,
|
|
+};
|
|
+
|
|
+/***********************************************************/
|
|
+struct coldfire_i2c {
|
|
+ void __iomem *base;
|
|
+ struct resource *irqarea;
|
|
+ struct resource *ioarea;
|
|
+ u32 irq;
|
|
+ struct i2c_adapter *adap;
|
|
+ u32 flags;
|
|
+};
|
|
+
|
|
+/*
|
|
+ * registering functions to load algorithms at runtime
|
|
+ */
|
|
+int i2c_mcf_add_bus(struct i2c_adapter *adap)
|
|
+{
|
|
+ struct i2c_algo_mcf_data *mcf_adap = adap->algo_data;
|
|
+
|
|
+ /*adap->id |= mcf_algo.id;*/
|
|
+ adap->algo = &mcf_algo;
|
|
+ adap->timeout = 100;
|
|
+
|
|
+ mcf_i2c_init(mcf_adap);
|
|
+
|
|
+#ifdef MODULE
|
|
+ MOD_INC_USE_COUNT;
|
|
+#endif
|
|
+
|
|
+ i2c_add_adapter(adap);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int mcf548x_i2c_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct coldfire_i2c *i2c;
|
|
+ int rc = 0;
|
|
+
|
|
+ /************************************************************/
|
|
+ i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
|
|
+ if (!i2c) {
|
|
+ printk(KERN_ERR "%s kzalloc coldfire_i2c faile\n",
|
|
+ __FUNCTION__);
|
|
+ return -ENOMEM;
|
|
+ }
|
|
+ /****************************************************************/
|
|
+ platform_set_drvdata(pdev, i2c);
|
|
+
|
|
+ i2c->adap = &i2c_mcf_board_adapter;
|
|
+ i2c->adap->dev.parent = &pdev->dev;
|
|
+ rc = i2c_mcf_add_bus(i2c->adap);
|
|
+ if (rc < 0) {
|
|
+ printk(KERN_ERR "%s - failed to add adapter\n", __FUNCTION__);
|
|
+ rc = -ENODEV;
|
|
+ goto fail_add;
|
|
+ }
|
|
+
|
|
+ printk(KERN_INFO "i2c-algo-mcf.o: I2C ColdFire algorithm"
|
|
+ " module is loaded.\n");
|
|
+ return rc;
|
|
+
|
|
+fail_add:
|
|
+ kfree(i2c);
|
|
+ return rc;
|
|
+};
|
|
+
|
|
+static int mcf548x_i2c_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct coldfire_i2c *i2c = platform_get_drvdata(pdev);
|
|
+
|
|
+ i2c_del_adapter(i2c->adap);
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
+ iounmap(i2c->base);
|
|
+ kfree(i2c);
|
|
+ return 0;
|
|
+};
|
|
+
|
|
+/* Structure for a device driver */
|
|
+static struct platform_driver mcf548x_i2c_driver = {
|
|
+ .probe = mcf548x_i2c_probe,
|
|
+ .remove = mcf548x_i2c_remove,
|
|
+ .driver = {
|
|
+ .owner = THIS_MODULE,
|
|
+ .name = "MCF548X-i2c",
|
|
+ },
|
|
+};
|
|
+
|
|
+static int __init coldfire_i2c_init(void)
|
|
+{
|
|
+ return platform_driver_register(&mcf548x_i2c_driver);
|
|
+}
|
|
+
|
|
+static void __exit coldfire_i2c_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&mcf548x_i2c_driver);
|
|
+}
|
|
+
|
|
+module_init(coldfire_i2c_init);
|
|
+module_exit(coldfire_i2c_exit);
|
|
+
|
|
+MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
|
|
+MODULE_DESCRIPTION
|
|
+ ("I2C-Bus adapter for MCF547x and MCF548x processors");
|
|
+MODULE_LICENSE("GPL");
|
|
--- /dev/null
|
|
+++ b/include/asm-m68k/m5485i2c.h
|
|
@@ -0,0 +1,45 @@
|
|
+/*
|
|
+ * m5485i2c.h -- ColdFire 547x/548x i2c controller support.
|
|
+ */
|
|
+#ifndef M548X_I2C_H
|
|
+#define M548X_I2C_H
|
|
+
|
|
+/* Register read/write macros */
|
|
+#define MCF_I2AR MCF_REG08(0x008F00) /* I2C Address */
|
|
+#define MCF_I2FDR MCF_REG08(0x008F04) /* I2C Frequency Divider */
|
|
+#define MCF_I2CR MCF_REG08(0x008F08) /* I2C Control */
|
|
+#define MCF_I2SR MCF_REG08(0x008F0C) /* I2C Status */
|
|
+#define MCF_I2DR MCF_REG08(0x008F10) /* I2C Data I/O */
|
|
+#define MCF_I2ICR MCF_REG08(0x008F20) /* I2C Interrupt Control */
|
|
+
|
|
+/* Bit definitions and macros for MCF_I2C_I2AR */
|
|
+#define MCF_I2AR_ADR(x) (((x)&0x7F)<<1)
|
|
+
|
|
+/* Bit definitions and macros for MCF_I2C_I2FDR */
|
|
+#define MCF_I2FDR_IC(x) (((x)&0x3F)<<0)
|
|
+
|
|
+/* Bit definitions and macros for MCF_I2C_I2CR */
|
|
+#define MCF_I2CR_RSTA (0x04)
|
|
+#define MCF_I2CR_TXAK (0x08)
|
|
+#define MCF_I2CR_MTX (0x10)
|
|
+#define MCF_I2CR_MSTA (0x20)
|
|
+#define MCF_I2CR_IIEN (0x40)
|
|
+#define MCF_I2CR_IEN (0x80)
|
|
+
|
|
+/* Bit definitions and macros for MCF_I2C_I2SR */
|
|
+#define MCF_I2SR_RXAK (0x01)
|
|
+#define MCF_I2SR_IIF (0x02)
|
|
+#define MCF_I2SR_SRW (0x04)
|
|
+#define MCF_I2SR_IAL (0x10)
|
|
+#define MCF_I2SR_IBB (0x20)
|
|
+#define MCF_I2SR_IAAS (0x40)
|
|
+#define MCF_I2SR_ICF (0x80)
|
|
+
|
|
+/* Bit definitions and macros for MCF_I2C_I2ICR */
|
|
+#define MCF_I2ICR_IE (0x01)
|
|
+#define MCF_I2ICR_RE (0x02)
|
|
+#define MCF_I2ICR_TE (0x04)
|
|
+#define MCF_I2ICR_BNBE (0x08)
|
|
+
|
|
+/********************************************************************/
|
|
+#endif
|