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70 lines
1.9 KiB
C
70 lines
1.9 KiB
C
/************************************************************************
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*
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* Copyright (c) 2005
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* Infineon Technologies AG
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* St. Martin Strasse 53; 81669 Muenchen; Germany
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*
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************************************************************************/
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#ifndef __ADM8668_H__
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#define __ADM8668_H__
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/*======================= Physical Memory Map ============================*/
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#define ADM8668_SDRAM_BASE 0
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#define ADM8668_SMEM1_BASE 0x10000000
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#define ADM8668_MPMC_BASE 0x11000000
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#define ADM8668_USB_BASE 0x11200000
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#define ADM8668_CONFIG_BASE 0x11400000
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#define ADM8668_WAN_BASE 0x11600000
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#define ADM8668_WLAN_BASE 0x11800000
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#define ADM8668_LAN_BASE 0x11A00000
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#define ADM8668_INTC_BASE 0x1E000000
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#define ADM8668_TMR_BASE 0x1E200000
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#define ADM8668_UART0_BASE 0x1E400000
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#define ADM8668_SMEM0_BASE 0x1FC00000
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#define ADM8668_NAND_BASE 0x1FFFFF00
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#define ADM8668_PCICFG_BASE 0x12200000
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#define ADM8668_PCIDAT_BASE 0x12400000
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/* interrupt levels */
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#define ADM8668_SWI_IRQ 1
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#define ADM8668_COMMS_RX_IRQ 2
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#define ADM8668_COMMS_TX_IRQ 3
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#define ADM8668_TIMER0_IRQ 4
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#define ADM8668_TIMER1_IRQ 5
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#define ADM8668_UART0_IRQ 6
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#define ADM8668_LAN_IRQ 7
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#define ADM8668_WAN_IRQ 8
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#define ADM8668_WLAN_IRQ 9
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#define ADM8668_GPIO_IRQ 10
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#define ADM8668_IDE_IRQ 11
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#define ADM8668_PCI2_IRQ 12
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#define ADM8668_PCI1_IRQ 13
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#define ADM8668_PCI0_IRQ 14
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#define ADM8668_USB_IRQ 15
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#define ADM8668_IRQ_MAX ADM8668_USB_IRQ
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/* register access macros */
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#define ADM8668_CONFIG_REG(_reg) \
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(*((volatile unsigned int *)(KSEG1ADDR(ADM8668_CONFIG_BASE + (_reg)))))
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/* lan registers */
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#define NETCSR6 0x30
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#define NETCSR7 0x38
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#define NETCSR37 0xF8
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/* known/used CPU configuration registers */
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#define ADM8668_CR0 0x00
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#define ADM8668_CR1 0x04
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#define ADM8668_CR3 0x0C
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#define ADM8668_CR66 0x108
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/** For GPIO control **/
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#define GPIO_REG 0x5C /* on WLAN */
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#define CRGPIO_REG 0x20 /* on CPU */
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void adm8668_init_clocks(void);
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#endif /* __ADM8668_H__ */
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