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77 lines
1.3 KiB
C
77 lines
1.3 KiB
C
/*
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* ADM8668 minimal clock support
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*
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* Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
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*
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* Licensed under the terms of the GPLv2
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <adm8668.h>
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struct clk {
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unsigned long rate;
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};
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static struct clk uart_clk = {
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.rate = 62500000,
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};
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static struct clk sys_clk;
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struct clk *clk_get(struct device *dev, const char *id)
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{
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const char *lookup = id;
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if (dev)
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lookup = dev_name(dev);
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if (!strcmp(lookup, "apb:uart0"))
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return &uart_clk;
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if (!strcmp(lookup, "sys"))
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return &sys_clk;
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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void __init adm8668_init_clocks(void)
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{
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u32 adj;
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/* adjustable clock selection
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* CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc...
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*/
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adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf;
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sys_clk.rate = 175000000 + (adj * 5000000);
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pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000);
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}
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