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61 lines
2.2 KiB
Diff
61 lines
2.2 KiB
Diff
From patchwork Tue Jan 9 14:42:21 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: PCI: dwc: fix enumeration end when reaching root subordinate
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From: Koen Vandeputte <koen.vandeputte@ncentric.com>
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X-Patchwork-Id: 10152443
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Message-Id: <1515508941-20055-1-git-send-email-koen.vandeputte@ncentric.com>
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To: linux-pci@vger.kernel.org
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Cc: bhelgaas@google.com, lorenzo.pieralisi@arm.com,
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Joao.Pinto@synopsys.com, jingoohan1@gmail.com, niklas.cassel@axis.com,
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Koen Vandeputte <koen.vandeputte@ncentric.com>,
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Mika Westerberg <mika.westerberg@linux.intel.com>
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Date: Tue, 9 Jan 2018 15:42:21 +0100
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The subordinate value indicates the highest bus number which can be
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reached downstream though a certain device.
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Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in
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parent")
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ensures that downstream devices cannot assign busnumbers higher than the
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upstream device subordinate number, which was indeed illogical.
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By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a
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value of 0x01.
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Due to this combined with above commit, enumeration stops digging deeper
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downstream as soon as bus num 0x01 has been assigned, which is always
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the case for a bridge device.
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This results in all devices behind a bridge bus to remain undetected, as
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these would be connected to bus 0x02 or higher.
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Fix this by initializing the RC to a subordinate value of 0xff, meaning
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that all busses [0x00-0xff] are reachable through this RC.
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Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in
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parent")
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Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Tested-by: Niklas Cassel <niklas.cassel@axis.com>
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Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
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---
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Will send separate patches to stable as this file got moved/renamed
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drivers/pci/host/pcie-designware.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -861,7 +861,7 @@ void dw_pcie_setup_rc(struct pcie_port *
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/* setup bus numbers */
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val = dw_pcie_readl_rc(pp, PCI_PRIMARY_BUS);
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val &= 0xff000000;
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- val |= 0x00010100;
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+ val |= 0x00ff0100;
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dw_pcie_writel_rc(pp, PCI_PRIMARY_BUS, val);
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/* setup command register */
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