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393 lines
11 KiB
Diff
393 lines
11 KiB
Diff
From c562ab80fe383e6fa49dbe38257421cf37f0e4b3 Mon Sep 17 00:00:00 2001
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From: Kurt Mahan <kmahan@freescale.com>
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Date: Wed, 31 Oct 2007 17:07:25 -0600
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Subject: [PATCH] MCF5445x FEC support.
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LTIBName: m5445x-fec
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Signed-off-by: Kurt Mahan <kmahan@freescale.com>
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---
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drivers/net/Kconfig | 8 ++-
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drivers/net/fec.c | 207 ++++++++++++++++++++++++++++++++++++++++++++++----
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drivers/net/fec.h | 2 +-
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3 files changed, 198 insertions(+), 19 deletions(-)
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--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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@@ -1973,7 +1973,7 @@ config 68360_ENET
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config FEC
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bool "FEC ethernet controller (of ColdFire CPUs)"
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- depends on M523x || M527x || M5272 || M528x || M520x
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+ depends on M523x || M527x || M5272 || M528x || M520x || M54455
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help
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Say Y here if you want to use the built-in 10/100 Fast ethernet
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controller on some Motorola ColdFire processors.
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@@ -1985,6 +1985,12 @@ config FEC2
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Say Y here if you want to use the second built-in 10/100 Fast
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ethernet controller on some Motorola ColdFire processors.
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+config FEC_SHARED_PHY
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+ bool "Shared PHY interface(on some ColdFire designs)"
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+ depends on FEC2
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+ help
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+ Say Y here if both PHYs are controlled via a single channel.
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+
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config FEC_MPC52xx
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tristate "MPC52xx FEC driver"
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depends on PPC_MERGE && PPC_MPC52xx && PPC_BESTCOMM_FEC
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--- a/drivers/net/fec.c
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+++ b/drivers/net/fec.c
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@@ -51,7 +51,9 @@
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
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defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
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- defined(CONFIG_M520x) || defined(CONFIG_M532x)
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+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
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+ defined(CONFIG_M54455)
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+
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include "fec.h"
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@@ -82,6 +84,11 @@ static unsigned int fec_hw[] = {
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(MCF_MBAR+0x30000),
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#elif defined(CONFIG_M532x)
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(MCF_MBAR+0xfc030000),
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+#elif defined(CONFIG_M54455)
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+ (MCF_MBAR+0xfc030000),
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+#if defined(CONFIG_FEC2)
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+ (MCF_MBAR+0xfc034000),
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+#endif
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#else
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&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec),
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#endif
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@@ -172,7 +179,7 @@ typedef struct {
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* account when setting it.
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*/
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
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- defined(CONFIG_M520x) || defined(CONFIG_M532x)
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+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
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#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
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#else
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#define OPT_FRAME_SIZE 0
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@@ -213,6 +220,7 @@ struct fec_enet_private {
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uint phy_speed;
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phy_info_t const *phy;
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struct work_struct phy_task;
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+ volatile fec_t *phy_hwp;
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uint sequence_done;
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uint mii_phy_task_queued;
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@@ -349,7 +357,8 @@ fec_enet_start_xmit(struct sk_buff *skb,
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if (bdp->cbd_bufaddr & 0x3) {
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unsigned int index;
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index = bdp - fep->tx_bd_base;
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- memcpy(fep->tx_bounce[index], (void *) bdp->cbd_bufaddr, bdp->cbd_datlen);
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+ memcpy(fep->tx_bounce[index],
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+ (void *)skb->data, bdp->cbd_datlen);
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bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]);
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}
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@@ -702,7 +711,7 @@ fec_enet_mii(struct net_device *dev)
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uint mii_reg;
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fep = netdev_priv(dev);
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- ep = fep->hwp;
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+ ep = fep->phy_hwp;
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mii_reg = ep->fec_mii_data;
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spin_lock(&fep->lock);
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@@ -753,7 +762,7 @@ mii_queue(struct net_device *dev, int re
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mii_tail = mip;
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} else {
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mii_head = mii_tail = mip;
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- fep->hwp->fec_mii_data = regval;
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+ fep->phy_hwp->fec_mii_data = regval;
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}
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} else {
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retval = 1;
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@@ -1151,8 +1160,7 @@ static phy_info_t const phy_info_ks8721b
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};
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/* ------------------------------------------------------------------------- */
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-/* register definitions for the DP83848 */
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-
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+/* register definitions for the DP83848 and DP83849 */
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#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */
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static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev)
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@@ -1186,27 +1194,50 @@ static void mii_parse_dp8384x_sr2(uint m
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*s |= PHY_STAT_FAULT;
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}
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+static phy_cmd_t const phy_cmd_dp8384x_ack_int[] = {
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+ { mk_mii_end, }
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+ };
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+
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+static phy_cmd_t const phy_cmd_dp8384x_shutdown[] = {
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+ { mk_mii_end, }
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+ };
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+
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static phy_info_t phy_info_dp83848= {
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- 0x020005c9,
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- "DP83848",
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+ .id = 0x020005c9,
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+ .name = "DP83848",
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- (const phy_cmd_t []) { /* config */
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+ .config = (const phy_cmd_t []) { /* config */
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{ mk_mii_read(MII_REG_CR), mii_parse_cr },
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{ mk_mii_read(MII_REG_ANAR), mii_parse_anar },
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{ mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
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{ mk_mii_end, }
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},
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- (const phy_cmd_t []) { /* startup - enable interrupts */
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+ .startup = (const phy_cmd_t []) { /* startup - enable interrupts */
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{ mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
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{ mk_mii_read(MII_REG_SR), mii_parse_sr },
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{ mk_mii_end, }
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},
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- (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */
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+ .ack_int = phy_cmd_dp8384x_ack_int,
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+ .shutdown = phy_cmd_dp8384x_shutdown,
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+};
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+
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+static phy_info_t phy_info_dp83849 = {
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+ .id = 0x020005ca,
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+ .name = "DP83849",
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+
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+ .config = (const phy_cmd_t []) { /* config */
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+ { mk_mii_read(MII_REG_CR), mii_parse_cr },
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+ { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
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+ { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
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{ mk_mii_end, }
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},
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- (const phy_cmd_t []) { /* shutdown */
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+ .startup = (const phy_cmd_t []) { /* startup - enable interrupts */
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+ { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
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+ { mk_mii_read(MII_REG_SR), mii_parse_sr },
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{ mk_mii_end, }
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},
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+ .ack_int = phy_cmd_dp8384x_ack_int,
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+ .shutdown = phy_cmd_dp8384x_shutdown,
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};
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/* ------------------------------------------------------------------------- */
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@@ -1218,6 +1249,7 @@ static phy_info_t const * const phy_info
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&phy_info_am79c874,
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&phy_info_ks8721bl,
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&phy_info_dp83848,
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+ &phy_info_dp83849,
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NULL
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};
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@@ -1799,6 +1831,138 @@ static void __inline__ fec_uncache(unsig
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/* ------------------------------------------------------------------------- */
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+#elif defined(CONFIG_M54455)
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+/*
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+ * Code specific for M54455
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+ */
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+
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+static void __inline__ fec_request_intrs(struct net_device *dev)
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+{
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+ struct fec_enet_private *fep;
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+ int b;
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+ static const struct idesc {
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+ char *name;
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+ unsigned short irq;
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+ } *idp, id[] = {
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+ { "fec(TXF)", 36 },
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+ { "fec(TXB)", 37 },
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+ { "fec(TXFIFO)", 38 },
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+ { "fec(TXCR)", 39 },
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+ { "fec(RXF)", 40 },
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+ { "fec(RXB)", 41 },
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+ { "fec(MII)", 42 },
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+ { "fec(LC)", 43 },
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+ { "fec(HBERR)", 44 },
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+ { "fec(GRA)", 45 },
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+ { "fec(EBERR)", 46 },
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+ { "fec(BABT)", 47 },
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+ { "fec(BABR)", 48 },
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+ { NULL },
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+ };
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+
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+ fep = netdev_priv(dev);
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+ b = (fep->index) ? 77 : 64;
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+
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+ /* Setup interrupt handlers. */
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+ for (idp = id; idp->name; idp++) {
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+ if (request_irq(b+idp->irq, fec_enet_interrupt, 0,
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+ idp->name, dev) != 0)
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+ printk(KERN_ERR "FEC: Could not alloc %s IRQ(%d)!\n",
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+ idp->name, b+idp->irq);
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+ }
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+
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+ if (fep->index) {
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+ /* Configure RMII */
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+ MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC &
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+ MCF_GPIO_PAR_FEC_FEC1_MASK) |
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+ MCF_GPIO_PAR_FEC_FEC1_RMII_GPIO;
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+ } else {
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+ /* Configure RMII */
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+ MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC &
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+ MCF_GPIO_PAR_FEC_FEC0_MASK) |
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+ MCF_GPIO_PAR_FEC_FEC0_RMII_GPIO;
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+ }
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+
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+ /* Set up gpio outputs for MII lines on FEC0 */
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+ MCF_GPIO_PAR_FECI2C |= (0 |
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+ MCF_GPIO_PAR_FECI2C_MDIO0_MDIO0 |
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+ MCF_GPIO_PAR_FECI2C_MDC0_MDC0);
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+}
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+
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+static void __inline__ fec_set_mii(struct net_device *dev,
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+ struct fec_enet_private *fep)
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+{
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+ volatile fec_t *fecp;
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+
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+ fecp = fep->hwp;
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+ fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
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+ fecp->fec_x_cntrl = 0x00;
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+
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+ /*
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+ * Set MII speed to 2.5 MHz
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+ */
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+ fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2;
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+ fecp->fec_mii_speed = fep->phy_speed;
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+
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+ fec_restart(dev, 0);
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+}
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+
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+static void __inline__ fec_get_mac(struct net_device *dev)
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+{
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+ struct fec_enet_private *fep = netdev_priv(dev);
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+ volatile fec_t *fecp;
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+ unsigned char *iap, tmpaddr[ETH_ALEN];
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+
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+ fecp = fep->hwp;
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+
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+ if (FEC_FLASHMAC) {
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+ /*
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+ * Get MAC address from FLASH.
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+ * If it is all 1's or 0's, use the default.
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+ */
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+ iap = FEC_FLASHMAC;
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+ if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) &&
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+ (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0))
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+ iap = fec_mac_default;
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+ if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) &&
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+ (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
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+ iap = fec_mac_default;
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+ } else {
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+ *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
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+ *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
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+ iap = &tmpaddr[0];
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+ }
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+
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+ memcpy(dev->dev_addr, iap, ETH_ALEN);
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+
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+ /* Adjust MAC if using default MAC address */
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+ if (iap == fec_mac_default)
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+ dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] +
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+ fep->index;
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+}
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+
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+static void __inline__ fec_enable_phy_intr(void)
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+{
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+}
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+
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+static void __inline__ fec_disable_phy_intr(void)
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+{
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+}
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+
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+static void __inline__ fec_phy_ack_intr(void)
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+{
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+}
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+
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+static void __inline__ fec_localhw_setup(void)
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+{
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+}
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+
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+static void __inline__ fec_uncache(unsigned long addr)
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+{
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+}
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+
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+/* ------------------------------------------------------------------------- */
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+
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#else
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@@ -2305,7 +2469,7 @@ fec_set_mac_address(struct net_device *d
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}
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-/* Initialize the FEC Ethernet on 860T (or ColdFire 5272).
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+/* Initialize the FEC Ethernet.
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*/
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/*
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* XXX: We need to clean up on failure exits here.
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@@ -2326,7 +2490,7 @@ int __init fec_enet_init(struct net_devi
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/* Allocate memory for buffer descriptors.
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*/
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- mem_addr = __get_free_page(GFP_KERNEL);
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+ mem_addr = __get_free_page(GFP_DMA);
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if (mem_addr == 0) {
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printk("FEC: allocate descriptor memory failed?\n");
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return -ENOMEM;
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@@ -2339,6 +2503,11 @@ int __init fec_enet_init(struct net_devi
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fep->index = index;
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fep->hwp = fecp;
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fep->netdev = dev;
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+#ifdef CONFIG_FEC_SHARED_PHY
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+ fep->phy_hwp = (volatile fec_t *) fec_hw[index & ~1];
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+#else
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+ fep->phy_hwp = fecp;
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+#endif
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/* Whack a reset. We should wait for this.
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*/
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@@ -2375,7 +2544,7 @@ int __init fec_enet_init(struct net_devi
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/* Allocate a page.
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*/
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- mem_addr = __get_free_page(GFP_KERNEL);
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+ mem_addr = __get_free_page(GFP_DMA);
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/* XXX: missing check for allocation failure */
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fec_uncache(mem_addr);
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@@ -2400,7 +2569,7 @@ int __init fec_enet_init(struct net_devi
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bdp = fep->tx_bd_base;
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for (i=0, j=FEC_ENET_TX_FRPPG; i<TX_RING_SIZE; i++) {
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if (j >= FEC_ENET_TX_FRPPG) {
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- mem_addr = __get_free_page(GFP_KERNEL);
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+ mem_addr = __get_free_page(GFP_DMA);
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j = 1;
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} else {
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mem_addr += FEC_ENET_TX_FRSIZE;
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@@ -2462,7 +2631,11 @@ int __init fec_enet_init(struct net_devi
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* remainder of the interface.
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*/
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fep->phy_id_done = 0;
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+#ifndef CONFIG_FEC_SHARED_PHY
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fep->phy_addr = 0;
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+#else
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+ fep->phy_addr = fep->index;
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+#endif
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mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
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index++;
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--- a/drivers/net/fec.h
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+++ b/drivers/net/fec.h
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@@ -14,7 +14,7 @@
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/****************************************************************************/
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
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- defined(CONFIG_M520x) || defined(CONFIG_M532x)
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+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
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/*
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* Just figures, Motorola would have to change the offsets for
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* registers in the same peripheral device on different models
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