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41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From a9ce1afb35317d2a0646c7530f0ae9822c93cd69 Mon Sep 17 00:00:00 2001
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From: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Date: Mon, 6 Oct 2014 11:37:56 +0200
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Subject: ARM: mvebu: Fix the Aurora L2 cache node with the required
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cache-unified property
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The L2 cache controller on the Armada 370 and Armada XP SoCs is a
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unified cache. Moreover, the Aurora cache controller is compatible
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with the L2x0 cache controller: the "cache-unified" property is
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required by its binding.
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This patch fixes the Aurora L2 cache node for the Armada 370 and
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Armada XP SoCs by adding this property.
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Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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--- a/arch/arm/boot/dts/armada-370.dtsi
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+++ b/arch/arm/boot/dts/armada-370.dtsi
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@@ -95,6 +95,7 @@
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compatible = "marvell,aurora-outer-cache";
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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+ cache-unified;
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wt-override;
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};
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--- a/arch/arm/boot/dts/armada-xp.dtsi
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+++ b/arch/arm/boot/dts/armada-xp.dtsi
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@@ -39,6 +39,7 @@
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compatible = "marvell,aurora-system-cache";
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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+ cache-unified;
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wt-override;
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};
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