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108 lines
3.2 KiB
Diff
108 lines
3.2 KiB
Diff
From a563dccef2871e37efcfcb2f3faee7c9f9381f6c Mon Sep 17 00:00:00 2001
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From: Calvin Johnson <calvin.johnson@nxp.com>
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Date: Wed, 20 Jun 2018 10:23:41 +0530
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Subject: [PATCH] staging: fsl_ppfe/eth: handle ls1012a errata_a010897
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On LS1012A rev 1.0, Jumbo frames are not supported as it causes
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the PFE controller to hang. A reset of the entire chip is required
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to resume normal operation.
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To handle this errata, frames with length > 1900 are truncated for
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rev 1.0 of LS1012A.
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Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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---
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drivers/staging/fsl_ppfe/pfe_eth.c | 20 +++++++++++++++++++-
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drivers/staging/fsl_ppfe/pfe_eth.h | 3 ++-
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drivers/staging/fsl_ppfe/pfe_hal.c | 10 +++++++++-
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3 files changed, 30 insertions(+), 3 deletions(-)
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--- a/drivers/staging/fsl_ppfe/pfe_eth.c
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+++ b/drivers/staging/fsl_ppfe/pfe_eth.c
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@@ -44,6 +44,7 @@
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include <linux/i2c.h>
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+#include <linux/fsl/guts.h>
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#if defined(CONFIG_NF_CONNTRACK_MARK)
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#include <net/netfilter/nf_conntrack.h>
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@@ -52,6 +53,10 @@
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#include "pfe_mod.h"
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#include "pfe_eth.h"
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+#define LS1012A_REV_1_0 0x87040010
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+
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+bool pfe_errata_a010897;
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+
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static void *cbus_emac_base[3];
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static void *cbus_gpi_base[3];
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@@ -2362,7 +2367,15 @@ static int pfe_eth_init_one(struct pfe *
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/* Set MTU limits */
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ndev->min_mtu = ETH_MIN_MTU;
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- ndev->max_mtu = JUMBO_FRAME_SIZE;
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+
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+/*
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+ * Jumbo frames are not supported on LS1012A rev-1.0.
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+ * So max mtu should be restricted to supported frame length.
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+ */
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+ if (pfe_errata_a010897)
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+ ndev->max_mtu = JUMBO_FRAME_SIZE_V1 - ETH_HLEN - ETH_FCS_LEN;
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+ else
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+ ndev->max_mtu = JUMBO_FRAME_SIZE_V2 - ETH_HLEN - ETH_FCS_LEN;
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/* supported features */
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ndev->hw_features = NETIF_F_SG;
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@@ -2453,6 +2466,11 @@ int pfe_eth_init(struct pfe *pfe)
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cbus_gpi_base[0] = EGPI1_BASE_ADDR;
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cbus_gpi_base[1] = EGPI2_BASE_ADDR;
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+ if (fsl_guts_get_svr() == LS1012A_REV_1_0)
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+ pfe_errata_a010897 = true;
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+ else
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+ pfe_errata_a010897 = false;
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+
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for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) {
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err = pfe_eth_init_one(pfe, ii);
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if (err)
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--- a/drivers/staging/fsl_ppfe/pfe_eth.h
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+++ b/drivers/staging/fsl_ppfe/pfe_eth.h
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@@ -85,7 +85,8 @@ struct ls1012a_pfe_platform_data {
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#define EMAC_TXQ_CNT 16
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#define EMAC_TXQ_DEPTH (HIF_TX_DESC_NT)
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-#define JUMBO_FRAME_SIZE 10258
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+#define JUMBO_FRAME_SIZE_V1 1900
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+#define JUMBO_FRAME_SIZE_V2 10258
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/*
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* Client Tx queue threshold, for txQ flush condition.
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* It must be smaller than the queue size (in case we ever change it in the
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--- a/drivers/staging/fsl_ppfe/pfe_hal.c
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+++ b/drivers/staging/fsl_ppfe/pfe_hal.c
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@@ -19,6 +19,9 @@
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#include "pfe_mod.h"
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#include "pfe/pfe.h"
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+/* A-010897: Jumbo frame is not supported */
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+extern bool pfe_errata_a010897;
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+
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#define PFE_RCR_MAX_FL_MASK 0xC000FFFF
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void *cbus_base_addr;
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@@ -1102,7 +1105,12 @@ void gemac_set_config(void *base, struct
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/*GEMAC config taken from VLSI */
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writel(0x00000004, base + EMAC_TFWR_STR_FWD);
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writel(0x00000005, base + EMAC_RX_SECTION_FULL);
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- writel(0x00003fff, base + EMAC_TRUNC_FL);
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+
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+ if (pfe_errata_a010897)
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+ writel(0x0000076c, base + EMAC_TRUNC_FL);
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+ else
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+ writel(0x00003fff, base + EMAC_TRUNC_FL);
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+
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writel(0x00000030, base + EMAC_TX_SECTION_EMPTY);
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writel(0x00000000, base + EMAC_MIB_CTRL_STS_REG);
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