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113 lines
3.0 KiB
Diff
113 lines
3.0 KiB
Diff
From 4de7a5e35eff9216fa5e6b138b0ffa75e045e397 Mon Sep 17 00:00:00 2001
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From: Xiaowei Bao <xiaowei.bao@nxp.com>
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Date: Thu, 28 Feb 2019 14:09:01 +0800
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Subject: [PATCH] arm64: dts: freescale: lx2160a: add pcie EP mode DT nodes
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The LX2160A PCIe EP mode node.
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Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 56 ++++++++++++++++++++++++++
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1 file changed, 56 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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@@ -932,6 +932,15 @@
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status = "disabled";
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};
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+ pcie_ep@3400000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03400000 0x0 0x00100000
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+ 0x80 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ status = "disabled";
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+ };
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+
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pcie@3500000 {
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compatible = "fsl,lx2160a-pcie";
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reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
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@@ -959,6 +968,15 @@
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status = "disabled";
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};
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+ pcie_ep@3500000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03500000 0x0 0x00100000
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+ 0x88 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ status = "disabled";
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+ };
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+
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pcie@3600000 {
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compatible = "fsl,lx2160a-pcie";
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reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
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@@ -986,6 +1004,16 @@
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status = "disabled";
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};
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+ pcie_ep@3600000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03600000 0x0 0x00100000
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+ 0x90 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ max-functions = <2>;
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+ status = "disabled";
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+ };
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+
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pcie@3700000 {
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compatible = "fsl,lx2160a-pcie";
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reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
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@@ -1013,6 +1041,15 @@
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status = "disabled";
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};
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+ pcie_ep@3700000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03700000 0x0 0x00100000
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+ 0x98 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ status = "disabled";
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+ };
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+
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pcie@3800000 {
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compatible = "fsl,lx2160a-pcie";
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reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
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@@ -1040,6 +1077,16 @@
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status = "disabled";
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};
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+ pcie_ep@3800000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03800000 0x0 0x00100000
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+ 0xa0 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ max-functions = <2>;
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+ status = "disabled";
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+ };
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+
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pcie@3900000 {
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compatible = "fsl,lx2160a-pcie";
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reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
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@@ -1067,6 +1114,15 @@
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status = "disabled";
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};
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+ pcie_ep@3900000 {
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+ compatible = "fsl,lx2160a-pcie-ep";
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+ reg = <0x00 0x03900000 0x0 0x00100000
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+ 0xa8 0x00000000 0x8 0x00000000>;
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+ reg-names = "regs", "addr_space";
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+ num-ob-windows = <256>;
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+ status = "disabled";
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+ };
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+
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smmu: iommu@5000000 {
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compatible = "arm,mmu-500";
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reg = <0 0x5000000 0 0x800000>;
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