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152 lines
4.2 KiB
Diff
152 lines
4.2 KiB
Diff
From 9c0785757dacd1aaf9e6e58b4f559e345093f1d4 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Thu, 27 Dec 2012 15:38:26 +0100
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Subject: [PATCH] watchdog: ath79_wdt: get register base from platform
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device's resources
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commit 09f5100a592d11dad06b218f41d560ff1f87f666 upstream.
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The ath79_wdt driver uses a fixed memory address
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currently. Although this is working with each
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currently supported SoCs, but this may change
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in the future. Additionally, the driver includes
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platform specific header files in order to be
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able to get the memory base of the watchdog
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device.
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The patch adds a memory resource to the platform
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device, and converts the driver to get the base
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address of the watchdog device from that.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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arch/mips/ath79/dev-common.c | 10 ++++++++-
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drivers/watchdog/ath79_wdt.c | 48 +++++++++++++++++++++++++++++++++---------
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2 files changed, 47 insertions(+), 11 deletions(-)
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--- a/arch/mips/ath79/dev-common.c
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+++ b/arch/mips/ath79/dev-common.c
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@@ -104,5 +104,13 @@ void __init ath79_register_uart(void)
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void __init ath79_register_wdt(void)
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{
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- platform_device_register_simple("ath79-wdt", -1, NULL, 0);
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+ struct resource res;
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+
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+ memset(&res, 0, sizeof(res));
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+
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+ res.flags = IORESOURCE_MEM;
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+ res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL;
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+ res.end = res.start + 0x8 - 1;
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+
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+ platform_device_register_simple("ath79-wdt", -1, &res, 1);
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}
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--- a/drivers/watchdog/ath79_wdt.c
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+++ b/drivers/watchdog/ath79_wdt.c
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@@ -23,6 +23,7 @@
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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+#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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@@ -33,13 +34,13 @@
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#include <linux/clk.h>
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#include <linux/err.h>
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-#include <asm/mach-ath79/ath79.h>
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-#include <asm/mach-ath79/ar71xx_regs.h>
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-
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#define DRIVER_NAME "ath79-wdt"
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#define WDT_TIMEOUT 15 /* seconds */
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+#define WDOG_REG_CTRL 0x00
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+#define WDOG_REG_TIMER 0x04
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+
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#define WDOG_CTRL_LAST_RESET BIT(31)
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#define WDOG_CTRL_ACTION_MASK 3
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#define WDOG_CTRL_ACTION_NONE 0 /* no action */
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@@ -66,27 +67,38 @@ static struct clk *wdt_clk;
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static unsigned long wdt_freq;
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static int boot_status;
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static int max_timeout;
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+static void __iomem *wdt_base;
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+
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+static inline void ath79_wdt_wr(unsigned reg, u32 val)
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+{
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+ iowrite32(val, wdt_base + reg);
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+}
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+
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+static inline u32 ath79_wdt_rr(unsigned reg)
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+{
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+ return ioread32(wdt_base + reg);
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+}
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static inline void ath79_wdt_keepalive(void)
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{
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- ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
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+ ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
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/* flush write */
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- ath79_reset_rr(AR71XX_RESET_REG_WDOG);
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+ ath79_wdt_rr(WDOG_REG_TIMER);
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}
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static inline void ath79_wdt_enable(void)
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{
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ath79_wdt_keepalive();
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- ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
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+ ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
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/* flush write */
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- ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
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+ ath79_wdt_rr(WDOG_REG_CTRL);
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}
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static inline void ath79_wdt_disable(void)
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{
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- ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
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+ ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
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/* flush write */
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- ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
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+ ath79_wdt_rr(WDOG_REG_CTRL);
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}
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static int ath79_wdt_set_timeout(int val)
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@@ -226,9 +238,25 @@ static struct miscdevice ath79_wdt_miscd
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static int ath79_wdt_probe(struct platform_device *pdev)
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{
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+ struct resource *res;
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u32 ctrl;
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int err;
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+ if (wdt_base)
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+ return -EBUSY;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev, "no memory resource found\n");
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+ return -EINVAL;
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+ }
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+
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+ wdt_base = devm_request_and_ioremap(&pdev->dev, res);
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+ if (!wdt_base) {
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+ dev_err(&pdev->dev, "unable to remap memory region\n");
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+ return -ENOMEM;
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+ }
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+
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wdt_clk = devm_clk_get(&pdev->dev, "wdt");
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if (IS_ERR(wdt_clk))
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return PTR_ERR(wdt_clk);
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@@ -251,7 +279,7 @@ static int ath79_wdt_probe(struct platfo
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max_timeout, timeout);
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}
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- ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
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+ ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
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boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
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err = misc_register(&ath79_wdt_miscdev);
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