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63 lines
2.5 KiB
Diff
63 lines
2.5 KiB
Diff
From 21bb8141c205ae48d331787debb6b272add90ac7 Mon Sep 17 00:00:00 2001
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From: Kevin Cernekee <cernekee@gmail.com>
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Date: Sat, 23 Jun 2012 04:14:54 +0000
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Subject: [PATCH 05/81] MIPS: BCM63XX: Add register definitions for USBD
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dependencies
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The USB 2.0 device depends on some functionality in other blocks, such
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as GPIO and USBH. Add those register definitions here.
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Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
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---
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 6 +++---
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 8 ++++++++
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2 files changed, 11 insertions(+), 3 deletions(-)
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -184,9 +184,9 @@ enum bcm63xx_regs_set {
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#define BCM_6328_SPI_BASE (0xdeadbeef)
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#define BCM_6328_UDC0_BASE (0xdeadbeef)
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#define BCM_6328_USBDMA_BASE (0xdeadbeef)
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-#define BCM_6328_OHCI0_BASE (0xdeadbeef)
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+#define BCM_6328_OHCI0_BASE (0xb0002600)
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#define BCM_6328_OHCI_PRIV_BASE (0xdeadbeef)
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-#define BCM_6328_USBH_PRIV_BASE (0xdeadbeef)
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+#define BCM_6328_USBH_PRIV_BASE (0xb0002700)
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#define BCM_6328_MPI_BASE (0xdeadbeef)
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#define BCM_6328_PCMCIA_BASE (0xdeadbeef)
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#define BCM_6328_PCIE_BASE (0xb0e40000)
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@@ -199,7 +199,7 @@ enum bcm63xx_regs_set {
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#define BCM_6328_ENETDMAC_BASE (0xb000da00)
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#define BCM_6328_ENETDMAS_BASE (0xb000dc00)
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#define BCM_6328_ENETSW_BASE (0xb0e00000)
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-#define BCM_6328_EHCI0_BASE (0x10002500)
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+#define BCM_6328_EHCI0_BASE (0xb0002500)
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#define BCM_6328_SDRAM_BASE (0xdeadbeef)
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#define BCM_6328_MEMC_BASE (0xdeadbeef)
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#define BCM_6328_DDR_BASE (0xb0003000)
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -543,6 +543,12 @@
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#define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
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+#define GPIO_PINMUX_OTHR_REG 0x24
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+#define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
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+#define GPIO_PINMUX_OTHR_6328_USB_MASK (3 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
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+#define GPIO_PINMUX_OTHR_6328_USB_HOST (1 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
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+#define GPIO_PINMUX_OTHR_6328_USB_DEV (2 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
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+
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#define GPIO_BASEMODE_6368_REG 0x38
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#define GPIO_BASEMODE_6368_UART2 0x1
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#define GPIO_BASEMODE_6368_GPIO 0x0
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@@ -770,6 +776,8 @@
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#define USBH_PRIV_SWAP_6358_REG 0x0
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#define USBH_PRIV_SWAP_6368_REG 0x1c
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+#define USBH_PRIV_SWAP_USBD_SHIFT 6
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+#define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
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#define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT 4
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#define USBH_PRIV_SWAP_EHCI_ENDN_MASK (1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT)
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#define USBH_PRIV_SWAP_EHCI_DATA_SHIFT 3
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