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278 lines
8.3 KiB
Diff
278 lines
8.3 KiB
Diff
From: Nathan Williams <nathan@traverse.com.au>
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To: netdev@vger.kernel.org
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Date: Wed, 05 Oct 2011 15:43:30 +1100
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Cc: linux-atm-general@lists.sourceforge.net,
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David Woodhouse <dwmw2@infradead.org>, linux-kernel@vger.kernel.org
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Subject: [Linux-ATM-General] [PATCH 1/4] atm: solos-pci: Add AnnexA/M
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capability attributes
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BisACapability and BisMCapability allow users to
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force either Annex A or Annex M.
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Signed-off-by: Nathan Williams <nathan@traverse.com.au>
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---
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drivers/atm/solos-attrlist.c | 2 ++
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1 files changed, 2 insertions(+), 0 deletions(-)
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--- a/drivers/atm/solos-attrlist.c
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+++ b/drivers/atm/solos-attrlist.c
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@@ -71,6 +71,8 @@ SOLOS_ATTR_RW(BisAForceSNRMarginDn)
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SOLOS_ATTR_RW(BisMForceSNRMarginDn)
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SOLOS_ATTR_RW(BisAMaxMargin)
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SOLOS_ATTR_RW(BisMMaxMargin)
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+SOLOS_ATTR_RW(BisACapability)
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+SOLOS_ATTR_RW(BisMCapability)
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SOLOS_ATTR_RW(AnnexAForceSNRMarginDn)
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SOLOS_ATTR_RW(AnnexAMaxMargin)
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SOLOS_ATTR_RW(AnnexMMaxMargin)
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--- a/drivers/atm/solos-pci.c
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+++ b/drivers/atm/solos-pci.c
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@@ -42,7 +42,8 @@
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#include <linux/swab.h>
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#include <linux/slab.h>
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-#define VERSION "0.07"
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+#define VERSION "1.0"
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+#define DRIVER_VERSION 0x01
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#define PTAG "solos-pci"
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#define CONFIG_RAM_SIZE 128
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@@ -56,16 +57,21 @@
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#define FLASH_BUSY 0x60
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#define FPGA_MODE 0x5C
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#define FLASH_MODE 0x58
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+#define GPIO_STATUS 0x54
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+#define DRIVER_VER 0x50
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#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
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#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
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#define DATA_RAM_SIZE 32768
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#define BUF_SIZE 2048
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#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
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-#define FPGA_PAGE 528 /* FPGA flash page size*/
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-#define SOLOS_PAGE 512 /* Solos flash page size*/
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-#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
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-#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
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+/* Old boards use ATMEL AD45DB161D flash */
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+#define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
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+#define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
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+#define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
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+#define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
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+/* Current boards use M25P/M25PE SPI flash */
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+#define SPI_FLASH_BLOCK (256 * 64)
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#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
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#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
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@@ -127,6 +133,7 @@ struct solos_card {
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int using_dma;
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int fpga_version;
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int buffer_size;
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+ int atmel_flash;
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};
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@@ -452,7 +459,6 @@ static ssize_t console_show(struct devic
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len = skb->len;
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memcpy(buf, skb->data, len);
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- dev_dbg(&card->dev->dev, "len: %d\n", len);
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kfree_skb(skb);
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return len;
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@@ -499,6 +505,87 @@ static ssize_t console_store(struct devi
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return err?:count;
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}
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+struct geos_gpio {
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+ char *name;
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+ int offset;
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+};
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+
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+static struct geos_gpio geos_gpio_pins[] = {
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+ {"GPIO1", 9},
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+ {"GPIO2", 10},
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+ {"GPIO3", 11},
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+ {"GPIO4", 12},
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+ {"GPIO5", 13},
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+ {"PushButton", 14},
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+ {NULL, 0}
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+};
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+
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+static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
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+ const char *buf, size_t count)
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+{
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+ struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
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+ struct solos_card *card = atmdev->dev_data;
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+ uint32_t data32;
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+
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+ struct geos_gpio *p = geos_gpio_pins;
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+ while(p->name){
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+ if(!strcmp(attr->attr.name, p->name)){
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+ break;
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+ }
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+ p++;
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+ }
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+
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ if(buf[0] == '1'){
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+ data32 |= 1 << p->offset;
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+ iowrite32(data32, card->config_regs + GPIO_STATUS);
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+ } else if(buf[0] == '0') {
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+ data32 &= ~(1 << p->offset);
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+ iowrite32(data32, card->config_regs + GPIO_STATUS);
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+ }
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+ return count;
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+}
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+
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+static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
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+ char *buf)
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+{
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+ struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
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+ struct solos_card *card = atmdev->dev_data;
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+ uint32_t data32;
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+
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+ struct geos_gpio *p = geos_gpio_pins;
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+ while(p->name){
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+ if(!strcmp(attr->attr.name, p->name)){
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+ break;
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+ }
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+ p++;
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+ }
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+
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ data32 = (data32 >> p->offset) & 1;
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+
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+ return sprintf(buf, "%d\n", data32);
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+}
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+
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+static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
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+ char *buf)
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+{
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+ struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
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+ struct solos_card *card = atmdev->dev_data;
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+ uint32_t data32;
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+
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ if(!strcmp(attr->attr.name, "HardwareVersion")){
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+ data32 = data32 & 0x1F;
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+ return sprintf(buf, "%d\n", data32);
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+ } else if(!strcmp(attr->attr.name, "HardwareVariant")){
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+ data32 = (data32 >> 5) & 0x0F;
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+ return sprintf(buf, "%d\n", data32);
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+ }
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+
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+ return sprintf(buf, "Error\n");
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+}
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+
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static DEVICE_ATTR(console, 0644, console_show, console_store);
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@@ -507,6 +594,14 @@ static DEVICE_ATTR(console, 0644, consol
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#include "solos-attrlist.c"
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+static DEVICE_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store);
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+static DEVICE_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store);
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+static DEVICE_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store);
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+static DEVICE_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store);
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+static DEVICE_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store);
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+static DEVICE_ATTR(PushButton, 0444, geos_gpio_show, NULL);
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+static DEVICE_ATTR(HardwareVersion, 0444, hardware_show, NULL);
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+static DEVICE_ATTR(HardwareVariant, 0444, hardware_show, NULL);
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#undef SOLOS_ATTR_RO
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#undef SOLOS_ATTR_RW
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@@ -515,6 +610,14 @@ static DEVICE_ATTR(console, 0644, consol
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static struct attribute *solos_attrs[] = {
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#include "solos-attrlist.c"
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+ &dev_attr_GPIO1.attr,
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+ &dev_attr_GPIO2.attr,
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+ &dev_attr_GPIO3.attr,
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+ &dev_attr_GPIO4.attr,
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+ &dev_attr_GPIO5.attr,
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+ &dev_attr_PushButton.attr,
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+ &dev_attr_HardwareVersion.attr,
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+ &dev_attr_HardwareVariant.attr,
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NULL
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};
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@@ -535,16 +638,25 @@ static int flash_upgrade(struct solos_ca
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switch (chip) {
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case 0:
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fw_name = "solos-FPGA.bin";
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- blocksize = FPGA_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_FPGA_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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break;
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case 1:
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fw_name = "solos-Firmware.bin";
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- blocksize = SOLOS_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_SOLOS_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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break;
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case 2:
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if (card->fpga_version > LEGACY_BUFFERS){
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fw_name = "solos-db-FPGA.bin";
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- blocksize = FPGA_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_FPGA_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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} else {
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dev_info(&card->dev->dev, "FPGA version doesn't support"
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" daughter board upgrades\n");
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@@ -554,7 +666,10 @@ static int flash_upgrade(struct solos_ca
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case 3:
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if (card->fpga_version > LEGACY_BUFFERS){
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fw_name = "solos-Firmware.bin";
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- blocksize = SOLOS_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_SOLOS_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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} else {
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dev_info(&card->dev->dev, "FPGA version doesn't support"
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" daughter board upgrades\n");
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@@ -599,9 +714,13 @@ static int flash_upgrade(struct solos_ca
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/* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
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iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
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- /* Copy block to buffer, swapping each 16 bits */
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+ /* Copy block to buffer, swapping each 16 bits for Atmel flash */
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for(i = 0; i < blocksize; i += 4) {
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- uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
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+ uint32_t word;
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+ if (card->atmel_flash)
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+ word = swahb32p((uint32_t *)(fw->data + offset + i));
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+ else
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+ word = *(uint32_t *)(fw->data + offset + i);
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if(card->fpga_version > LEGACY_BUFFERS)
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iowrite32(word, FLASH_BUF + i);
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else
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@@ -1153,6 +1272,11 @@ static int fpga_probe(struct pci_dev *de
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db_fpga_upgrade = db_firmware_upgrade = 0;
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}
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+ /* Stopped using Atmel flash after 0.03-38 */
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+ if (fpga_ver < 39)
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+ card->atmel_flash = 1;
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+ else
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+ card->atmel_flash = 0;
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if (card->fpga_version >= DMA_SUPPORTED){
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card->using_dma = 1;
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} else {
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@@ -1160,6 +1284,8 @@ static int fpga_probe(struct pci_dev *de
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/* Set RX empty flag for all ports */
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iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
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}
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+ /* New FPGAs require driver version before permitting flash upgrades */
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+ iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
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data32 = ioread32(card->config_regs + PORTS);
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card->nr_ports = (data32 & 0x000000FF);
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