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90 lines
2.8 KiB
Diff
90 lines
2.8 KiB
Diff
--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -104,31 +104,31 @@ static struct rt2880_pmx_group mt7620a_p
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};
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static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
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- FUNC("sdcx d6", 3, 19, 1),
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+ FUNC("sdxc d6", 3, 19, 1),
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FUNC("utif", 2, 19, 1),
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FUNC("gpio", 1, 19, 1),
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FUNC("pwm1", 0, 19, 1),
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};
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static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
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- FUNC("sdcx d7", 3, 18, 1),
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+ FUNC("sdxc d7", 3, 18, 1),
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FUNC("utif", 2, 18, 1),
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FUNC("gpio", 1, 18, 1),
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FUNC("pwm0", 0, 18, 1),
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};
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static struct rt2880_pmx_func uart2_grp_mt7628[] = {
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- FUNC("sdcx d5 d4", 3, 20, 2),
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+ FUNC("sdxc d5 d4", 3, 20, 2),
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FUNC("pwm", 2, 20, 2),
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FUNC("gpio", 1, 20, 2),
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- FUNC("uart", 0, 20, 2),
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+ FUNC("uart2", 0, 20, 2),
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};
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static struct rt2880_pmx_func uart1_grp_mt7628[] = {
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FUNC("sw_r", 3, 45, 2),
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FUNC("pwm", 2, 45, 2),
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FUNC("gpio", 1, 45, 2),
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- FUNC("uart", 0, 45, 2),
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+ FUNC("uart1", 0, 45, 2),
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};
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static struct rt2880_pmx_func i2c_grp_mt7628[] = {
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@@ -140,21 +140,21 @@ static struct rt2880_pmx_func i2c_grp_mt
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static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) };
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static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) };
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-static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 15, 38) };
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+static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
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static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };
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static struct rt2880_pmx_func sd_mode_grp_mt7628[] = {
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FUNC("jtag", 3, 22, 8),
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FUNC("utif", 2, 22, 8),
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FUNC("gpio", 1, 22, 8),
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- FUNC("sdcx", 0, 22, 8),
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+ FUNC("sdxc", 0, 22, 8),
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};
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static struct rt2880_pmx_func uart0_grp_mt7628[] = {
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FUNC("-", 3, 12, 2),
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FUNC("-", 2, 12, 2),
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FUNC("gpio", 1, 12, 2),
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- FUNC("uart", 0, 12, 2),
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+ FUNC("uart0", 0, 12, 2),
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};
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static struct rt2880_pmx_func i2s_grp_mt7628[] = {
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@@ -449,6 +449,8 @@ void __init ralink_clk_init(void)
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000c00.uartlite", periph_rate);
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+ ralink_clk_add("10000d00.uart1", periph_rate);
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+ ralink_clk_add("10000e00.uart2", periph_rate);
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ralink_clk_add("10180000.wmac", xtal_rate);
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if (IS_ENABLED(CONFIG_USB) &&
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@@ -571,13 +573,13 @@ void prom_soc_init(struct ralink_soc_inf
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cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
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- if (ralink_soc == MT762X_SOC_MT7628AN)
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+ if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
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dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
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else
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dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
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soc_info->mem_base = MT7620_DRAM_BASE;
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- if (ralink_soc == MT762X_SOC_MT7628AN)
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+ if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
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mt7628_dram_init(soc_info);
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else
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mt7620_dram_init(soc_info);
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