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34 lines
1.5 KiB
Diff
34 lines
1.5 KiB
Diff
From 5e2df5f44e35d79fff2ab8bbb8a726ad5de78a3e Mon Sep 17 00:00:00 2001
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From: Matthew McClintock <mmcclint@qca.qualcomm.com>
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Date: Thu, 28 Apr 2016 12:55:08 -0500
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Subject: [PATCH 16/69] clk: ipq4019: report accurate fixed clock rates
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This looks like a copy-and-paste gone wrong, but update all
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the fixed clock rates to report the correct values.
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Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
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---
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drivers/clk/qcom/gcc-ipq4019.c | 10 +++++-----
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1 file changed, 5 insertions(+), 5 deletions(-)
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--- a/drivers/clk/qcom/gcc-ipq4019.c
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+++ b/drivers/clk/qcom/gcc-ipq4019.c
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@@ -1327,12 +1327,12 @@ static int gcc_ipq4019_probe(struct plat
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{
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struct device *dev = &pdev->dev;
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- clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000);
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- clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000);
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- clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000);
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- clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000);
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+ clk_register_fixed_rate(dev, "fepll125", "xo", 0, 125000000);
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+ clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 125000000);
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+ clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 250000000);
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+ clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 250000000);
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clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000);
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- clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000);
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+ clk_register_fixed_rate(dev, "fepll500", "xo", 0, 500000000);
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clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000);
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return qcom_cc_probe(pdev, &gcc_ipq4019_desc);
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