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473 lines
12 KiB
Diff
473 lines
12 KiB
Diff
From e5d89837a365a810b3cc5ce58d273a7c49029f36 Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Sun, 5 Sep 2010 03:19:10 +0200
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Subject: [PATCH] i2c: Add i2c driver for JZ47XX SoCs
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This patch adds a driver for the i2c controller found in Ingenic JZ47XX based
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SoCs.
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Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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---
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drivers/i2c/busses/Kconfig | 10 +
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drivers/i2c/busses/Makefile | 1 +
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drivers/i2c/busses/i2c-jz47xx.c | 424 +++++++++++++++++++++++++++++++++++++++
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3 files changed, 435 insertions(+), 0 deletions(-)
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create mode 100644 drivers/i2c/busses/i2c-jz47xx.c
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--- a/drivers/i2c/busses/Kconfig
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+++ b/drivers/i2c/busses/Kconfig
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@@ -420,6 +420,16 @@ config I2C_IXP2000
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This driver is deprecated and will be dropped soon. Use i2c-gpio
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instead.
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+config I2C_JZ47XX
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+ tristate "JZ4740 I2C Interface"
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+ depends on MACH_JZ4740
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+ help
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+ Say Y here if you want support for the I2C controller found on Ingenic
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+ JZ47XX based SoCs.
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+
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+ This driver can also be built as a module. If so, the module will be
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+ called i2c-jz47xx.
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+
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config I2C_MPC
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tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
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depends on PPC32
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--- a/drivers/i2c/busses/Makefile
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+++ b/drivers/i2c/busses/Makefile
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@@ -40,6 +40,7 @@ obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic
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obj-$(CONFIG_I2C_IMX) += i2c-imx.o
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obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
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obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
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+obj-$(CONFIG_I2C_JZ47XX) += i2c-jz47xx.o
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obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
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obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
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obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
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--- /dev/null
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+++ b/drivers/i2c/busses/i2c-jz47xx.c
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@@ -0,0 +1,424 @@
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+
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/err.h>
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+#include <linux/clk.h>
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+#include <linux/platform_device.h>
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+#include <linux/i2c.h>
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+#include <linux/slab.h>
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+#include <linux/interrupt.h>
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+
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+#include <linux/gpio.h>
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+#include <linux/delay.h>
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+
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+#define JZ47XX_REG_I2C_DATA 0x00
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+#define JZ47XX_REG_I2C_CTRL 0x04
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+#define JZ47XX_REG_I2C_STATUS 0x08
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+#define JZ47XX_REG_I2C_CLOCK 0x0C
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+
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+#define JZ47XX_I2C_STATUS_FIFO_FULL BIT(4)
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+#define JZ47XX_I2C_STATUS_BUSY BIT(3)
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+#define JZ47XX_I2C_STATUS_TEND BIT(2)
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+#define JZ47XX_I2C_STATUS_DATA_VALID BIT(1)
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+#define JZ47XX_I2C_STATUS_NACK BIT(0)
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+
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+#define JZ47XX_I2C_CTRL_IRQ_ENABLE BIT(4)
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+#define JZ47XX_I2C_CTRL_START BIT(3)
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+#define JZ47XX_I2C_CTRL_STOP BIT(2)
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+#define JZ47XX_I2C_CTRL_NACK BIT(1)
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+#define JZ47XX_I2C_CTRL_ENABLE BIT(0)
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+
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+struct jz47xx_i2c {
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+ struct resource *mem;
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+ void __iomem *base;
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+ int irq;
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+ struct clk *clk;
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+
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+ struct i2c_adapter adapter;
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+
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+ wait_queue_head_t wait_queue;
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+};
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+
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+static inline struct jz47xx_i2c *adapter_to_jz47xx_i2c(struct i2c_adapter *adap)
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+{
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+ return container_of(adap, struct jz47xx_i2c, adapter);
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+}
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+
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+static inline void jz47xx_i2c_set_ctrl(struct jz47xx_i2c *jz47xx_i2c,
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+ uint8_t mask, uint8_t value)
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+{
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+ uint8_t ctrl;
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+ ctrl = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_CTRL);
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+ ctrl &= ~mask;
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+ ctrl |= value;
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+ printk("ctrl: %x\n", ctrl);
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+ writeb(ctrl, jz47xx_i2c->base + JZ47XX_REG_I2C_CTRL);
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+}
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+
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+static irqreturn_t jz47xx_i2c_irq_handler(int irq, void *devid)
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+{
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+ struct jz47xx_i2c *jz47xx_i2c = devid;
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+
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+ printk("IRQ\n");
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+
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+ wake_up(&jz47xx_i2c->wait_queue);
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+
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_IRQ_ENABLE, 0);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static inline void jz47xx_i2c_set_data_valid(struct jz47xx_i2c *jz47xx_i2c,
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+ bool valid)
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+{
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+ uint8_t val;
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+ val = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
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+ if (valid)
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+ val |= JZ47XX_I2C_STATUS_DATA_VALID;
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+ else
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+ val &= ~JZ47XX_I2C_STATUS_DATA_VALID;
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+ writeb(val, jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
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+}
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+
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+static int jz47xx_i2c_test_event(struct jz47xx_i2c *jz47xx_i2c, uint8_t mask, uint8_t value)
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+{
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+ uint8_t status;
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+
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+ mask |= JZ47XX_I2C_STATUS_NACK;
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+ value |= JZ47XX_I2C_STATUS_NACK;
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+
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+ status = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS);
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+ printk("status: %x %x %x %x\n", status, mask, value, (status & mask) ^
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+ value);
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+ if (((status & mask) ^ value) == mask) {
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_IRQ_ENABLE,
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+ JZ47XX_I2C_CTRL_IRQ_ENABLE);
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+ return 0;
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+ }
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+ return 1;
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+}
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+
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+static int jz47xx_i2c_wait_event_or_nack(struct jz47xx_i2c *jz47xx_i2c, uint8_t
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+mask, uint8_t value)
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+{
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+ int ret;
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+
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+ ret = wait_event_interruptible_timeout(jz47xx_i2c->wait_queue,
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+ jz47xx_i2c_test_event(jz47xx_i2c, mask, value), 30 * HZ);
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+
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+/* while (!jz47xx_i2c_test_event(jz47xx_i2c, mask, value));
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+
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+ ret = 1;*/
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+
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+ printk("wait event or nack: %d %x\n", ret, readb(jz47xx_i2c->base +
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+ JZ47XX_REG_I2C_STATUS));
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+
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+ if (ret == 0)
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+ ret = -ETIMEDOUT;
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+ else if(ret > 0) {
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+ if (readb(jz47xx_i2c->base + JZ47XX_REG_I2C_STATUS) & JZ47XX_I2C_STATUS_NACK)
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+ ret = -EIO;
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+ else
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+ ret = 0;
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+ }
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+
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+ return ret;
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+}
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+
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+static int jz47xx_i2c_wait_event(struct jz47xx_i2c *jz47xx_i2c, uint8_t event)
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+{
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+ int ret;
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+
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+ ret = wait_event_interruptible_timeout(jz47xx_i2c->wait_queue,
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+ jz47xx_i2c_test_event(jz47xx_i2c, event, event), 30 * HZ);
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+
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+ if (ret == 0)
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+ ret = -ETIMEDOUT;
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+ else if(ret > 0)
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+ ret = 0;
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+
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+ return ret;
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+}
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+
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+
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+static int jz47xx_i2c_write_msg(struct jz47xx_i2c *jz47xx_i2c,
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+ struct i2c_msg *msg)
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+{
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+ int ret;
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+ int i;
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+
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+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+ for (i = 0; i < msg->len; ++i) {
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+ writeb(msg->buf[i], jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
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+ jz47xx_i2c_set_data_valid(jz47xx_i2c, true);
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+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
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+ JZ47XX_I2C_STATUS_DATA_VALID, 0);
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+ if (ret)
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+ break;
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+ }
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_STOP,
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+ JZ47XX_I2C_CTRL_STOP);
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+
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+ if (!ret)
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+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c, JZ47XX_I2C_STATUS_TEND,
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+ JZ47XX_I2C_STATUS_TEND);
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+
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+ return ret;
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+}
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+
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+static int jz47xx_i2c_read_msg(struct jz47xx_i2c *jz47xx_i2c,
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+ struct i2c_msg *msg)
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+{
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+ int i;
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+ int ret;
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+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
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+ msg->len == 1 ? JZ47XX_I2C_CTRL_NACK : 0);
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+
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+ for (i = 0; i < msg->len; ++i) {
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+ ret = jz47xx_i2c_wait_event(jz47xx_i2c, JZ47XX_I2C_STATUS_DATA_VALID);
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+ if (ret) {
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
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+ JZ47XX_I2C_CTRL_NACK);
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+ break;
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+ }
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+
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+ if (i == msg->len - 2) {
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_NACK,
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+ JZ47XX_I2C_CTRL_NACK);
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+ }
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+
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+ msg->buf[i] = readb(jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
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+ printk("read: %x\n", msg->buf[i]);
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+ jz47xx_i2c_set_data_valid(jz47xx_i2c, false);
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+ }
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+
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_STOP,
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+ JZ47XX_I2C_CTRL_STOP);
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+
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+ return ret;
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+}
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+
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+static int jz47xx_i2c_xfer_msg(struct jz47xx_i2c *jz47xx_i2c,
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+ struct i2c_msg *msg)
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+{
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+ uint8_t addr;
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+ int ret;
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+
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+ addr = msg->addr << 1;
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+ if (msg->flags & I2C_M_RD)
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+ addr |= 1;
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+
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, JZ47XX_I2C_CTRL_START,
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+ JZ47XX_I2C_CTRL_START);
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+ writeb(addr, jz47xx_i2c->base + JZ47XX_REG_I2C_DATA);
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+ jz47xx_i2c_set_data_valid(jz47xx_i2c, true);
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+
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+ if (msg->flags & I2C_M_RD) {
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+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
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+ JZ47XX_I2C_STATUS_TEND, JZ47XX_I2C_STATUS_TEND);
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+ if (!ret)
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+ ret = jz47xx_i2c_read_msg(jz47xx_i2c, msg);
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+ } else {
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+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+ ret = jz47xx_i2c_wait_event_or_nack(jz47xx_i2c,
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+ JZ47XX_I2C_STATUS_DATA_VALID, 0);
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+ if (!ret)
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+ ret = jz47xx_i2c_write_msg(jz47xx_i2c, msg);
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+ }
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+
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+ return ret;
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+}
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+
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+static int jz47xx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int
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+num)
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+{
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+ struct jz47xx_i2c *jz47xx_i2c = adapter_to_jz47xx_i2c(adap);
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+ int ret = 0;
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+ int i;
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+ int mask = JZ47XX_I2C_CTRL_ENABLE;
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+
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+ printk("xfer: %d %x\n", num, readb(jz47xx_i2c->base +
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+ JZ47XX_REG_I2C_STATUS));
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+
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+ clk_enable(jz47xx_i2c->clk);
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, mask, mask);
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+
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+ for (i = 0; i < num; ++i) {
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+ ret = jz47xx_i2c_xfer_msg(jz47xx_i2c, &msgs[i]);
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+ if (ret)
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+ break;
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+ }
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+
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+ jz47xx_i2c_set_ctrl(jz47xx_i2c, mask, 0);
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+ clk_disable(jz47xx_i2c->clk);
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+
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+ printk("xfer ret: %d\n", ret);
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+
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+ return ret;
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+}
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+
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+static u32 jz47xx_i2c_functionality(struct i2c_adapter *adap)
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+{
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+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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+}
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+
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+static const struct i2c_algorithm jz47xx_i2c_algorithm = {
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+ .master_xfer = jz47xx_i2c_xfer,
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+ .functionality = jz47xx_i2c_functionality,
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+};
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+
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+const static struct jz_gpio_bulk_request jz47xx_i2c_pins[] = {
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+ JZ_GPIO_BULK_PIN(I2C_SDA),
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+ JZ_GPIO_BULK_PIN(I2C_SCK),
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+};
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+
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+static int __devinit jz47xx_i2c_probe(struct platform_device *pdev)
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+{
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+ struct jz47xx_i2c *jz47xx_i2c;
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+ struct resource *mem;
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+ void __iomem *base;
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+ struct clk *clk;
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+ int irq;
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+ int ret;
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+
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+ irq = platform_get_irq(pdev, 0);
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+ if (!irq) {
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+ dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
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+ return irq;
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+ }
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+
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+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!mem) {
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+ dev_err(&pdev->dev, "Failed to get iomem region\n");
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+ return -ENXIO;
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+ }
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+
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+ mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
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+ if (!mem) {
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+ dev_err(&pdev->dev, "Failed to request iomem region\n");
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+ return -EBUSY;
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+ }
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+
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+ base = ioremap(mem->start, resource_size(mem));
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+ if (!base) {
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+ dev_err(&pdev->dev, "Failed to ioremap iomem\n");
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+ ret = -EBUSY;
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+ goto err_release_mem_region;
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+ }
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+
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+ clk = clk_get(&pdev->dev, "i2c");
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+ if (IS_ERR(clk)) {
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+ ret = PTR_ERR(clk);
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+ goto err_iounmap;
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+ }
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+
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+ jz47xx_i2c = kzalloc(sizeof(*jz47xx_i2c), GFP_KERNEL);
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+ if (!jz47xx_i2c) {
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+ ret = -ENOMEM;
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+ goto err_clk_put;
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+ }
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+
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+ jz47xx_i2c->adapter.owner = THIS_MODULE;
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+ jz47xx_i2c->adapter.algo = &jz47xx_i2c_algorithm;
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+ jz47xx_i2c->adapter.dev.parent = &pdev->dev;
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+ jz47xx_i2c->adapter.nr = pdev->id < 0 ?: 0;
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+ strcpy(jz47xx_i2c->adapter.name, pdev->name);
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+
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+ jz47xx_i2c->mem = mem;
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+ jz47xx_i2c->base = base;
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+ jz47xx_i2c->clk = clk;
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+ jz47xx_i2c->irq = irq;
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+
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+ init_waitqueue_head(&jz47xx_i2c->wait_queue);
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+
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+ ret = request_irq(irq, jz47xx_i2c_irq_handler, 0, pdev->name, jz47xx_i2c);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
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+ goto err_free;
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+ }
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+
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+ ret = jz_gpio_bulk_request(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
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+ if (ret) {
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+ dev_err(&pdev->dev, "Failed to request i2c pins: %d\n", ret);
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+ goto err_free_irq;
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+ }
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+
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+ writew(0x10, jz47xx_i2c->base + JZ47XX_REG_I2C_CLOCK);
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+
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+ ret = i2c_add_numbered_adapter(&jz47xx_i2c->adapter);
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+ if (ret) {
|
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+ dev_err(&pdev->dev, "Failed to add i2c adapter: %d\n", ret);
|
|
+ goto err_free_gpios;
|
|
+ }
|
|
+
|
|
+ platform_set_drvdata(pdev, jz47xx_i2c);
|
|
+
|
|
+ printk("JZ4740 I2C\n");
|
|
+
|
|
+ return 0;
|
|
+
|
|
+err_free_gpios:
|
|
+ jz_gpio_bulk_free(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
|
|
+err_free_irq:
|
|
+ free_irq(irq, jz47xx_i2c);
|
|
+err_free:
|
|
+ kfree(jz47xx_i2c);
|
|
+err_clk_put:
|
|
+ clk_put(clk);
|
|
+err_iounmap:
|
|
+ iounmap(base);
|
|
+err_release_mem_region:
|
|
+ release_mem_region(mem->start, resource_size(mem));
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int __devexit jz47xx_i2c_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct jz47xx_i2c *jz47xx_i2c = platform_get_drvdata(pdev);
|
|
+
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
+ i2c_del_adapter(&jz47xx_i2c->adapter);
|
|
+
|
|
+ jz_gpio_bulk_free(jz47xx_i2c_pins, ARRAY_SIZE(jz47xx_i2c_pins));
|
|
+
|
|
+ free_irq(jz47xx_i2c->irq, jz47xx_i2c);
|
|
+ clk_put(jz47xx_i2c->clk);
|
|
+
|
|
+ iounmap(jz47xx_i2c->base);
|
|
+ release_mem_region(jz47xx_i2c->mem->start, resource_size(jz47xx_i2c->mem));
|
|
+
|
|
+ kfree(jz47xx_i2c);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver jz47xx_i2c_driver = {
|
|
+ .probe = jz47xx_i2c_probe,
|
|
+ .remove = jz47xx_i2c_remove,
|
|
+ .driver = {
|
|
+ .name = "jz47xx-i2c",
|
|
+ .owner = THIS_MODULE,
|
|
+ },
|
|
+};
|
|
+
|
|
+static int __init jz47xx_i2c_init(void)
|
|
+{
|
|
+ return platform_driver_register(&jz47xx_i2c_driver);
|
|
+}
|
|
+module_init(jz47xx_i2c_init);
|
|
+
|
|
+static void jz47xx_i2c_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&jz47xx_i2c_driver);
|
|
+}
|
|
+module_exit(jz47xx_i2c_exit);
|
|
+
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
+MODULE_DESCRIPTION("I2C adapter driver for JZ47XX SoCs");
|
|
+MODULE_ALIAS("platform:jz47xx-i2c");
|
|
+
|