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30 lines
1.1 KiB
Diff
30 lines
1.1 KiB
Diff
From 09bbf8c732e7a6ce290fc7c2d5a3e79ec6c3e8d2 Mon Sep 17 00:00:00 2001
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From: Mathias Kresin <dev@kresin.me>
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Date: Wed, 3 Jul 2019 17:03:02 +0200
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Subject: [PATCH] usb: dwc2: use a longer core rest timeout in
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dwc2_core_reset()
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Testing on different generations of Lantiq MIPS SoC based boards, showed
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that it takes up to 1500 us until the core reset bit is cleared.
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The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the
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same timeout to fix wrong hang detections and make the driver work for
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Lantiq MIPS SoCs.
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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---
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drivers/usb/dwc2/core.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/usb/dwc2/core.c
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+++ b/drivers/usb/dwc2/core.c
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@@ -524,7 +524,7 @@ int dwc2_core_reset(struct dwc2_hsotg *h
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greset |= GRSTCTL_CSFTRST;
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dwc2_writel(hsotg, greset, GRSTCTL);
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- if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 50)) {
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+ if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) {
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dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL GRSTCTL_CSFTRST\n",
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__func__);
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return -EBUSY;
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