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142 lines
4.3 KiB
Diff
142 lines
4.3 KiB
Diff
From 014f9196e18f4157232d0521f3a7502e7dbbb974 Mon Sep 17 00:00:00 2001
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From: Alison Wang <b18965@freescale.com>
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Date: Fri, 13 May 2016 13:28:07 +0800
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Subject: [PATCH 02/93] armv8: SMP support for loading 32-bit OS
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Spin-table method is used for secondary cores to load 32-bit OS. The
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architecture information will be got through checking FIT image and
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saved in the os_arch element of spin-table, then the secondary cores
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will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
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Signed-off-by: Alison Wang <alison.wang@nxp.com>
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Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
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---
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arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 21 +++++++++++++++++++++
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arch/arm/cpu/armv8/fsl-layerscape/mp.c | 10 ++++++++++
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arch/arm/include/asm/arch-fsl-layerscape/mp.h | 6 ++++++
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arch/arm/lib/bootm.c | 5 +++++
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4 files changed, 42 insertions(+)
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diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
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index 9c69ed1..93f4a65 100644
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--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
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+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
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@@ -13,6 +13,7 @@
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#ifdef CONFIG_MP
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#include <asm/arch/mp.h>
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#endif
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+#include <asm/u-boot.h>
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ENTRY(lowlevel_init)
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mov x29, lr /* Save LR */
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@@ -320,6 +321,11 @@ ENTRY(secondary_boot_func)
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gic_wait_for_interrupt_m x0, w1
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#endif
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+ ldr x5, [x11, #24]
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+ ldr x6, =IH_ARCH_DEFAULT
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+ cmp x6, x5
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+ b.ne slave_cpu
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+
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bl secondary_switch_to_el2
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#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
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bl secondary_switch_to_el1
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@@ -337,6 +343,21 @@ slave_cpu:
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tbz x1, #25, cpu_is_le
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rev x0, x0 /* BE to LE conversion */
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cpu_is_le:
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+
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+ ldr x5, [x11, #24]
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+ ldr x6, =IH_ARCH_DEFAULT
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+ cmp x6, x5
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+ b.eq 1f
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+
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+#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
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+ bl secondary_switch_to_el2
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+ ldr x0, [x11]
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+ bl armv8_switch_to_el1_aarch32
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+#else
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+ bl armv8_switch_to_el2_aarch32
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+#endif
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+
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+1:
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br x0 /* branch to the given address */
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ENDPROC(secondary_boot_func)
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diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
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index df7ffb8..dd91550 100644
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--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
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+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
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@@ -22,6 +22,16 @@ phys_addr_t determine_mp_bootpg(void)
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return (phys_addr_t)&secondary_boot_code;
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}
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+void update_os_arch_secondary_cores(uint8_t os_arch)
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+{
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+ u64 *table = get_spin_tbl_addr();
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+ int i;
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+
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+ for (i = 1; i < CONFIG_MAX_CPUS; i++)
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+ table[i * WORDS_PER_SPIN_TABLE_ENTRY +
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+ SPIN_TABLE_ELEM_OS_ARCH_IDX] = os_arch;
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+}
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+
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int fsl_layerscape_wake_seconday_cores(void)
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{
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
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index e46e076..55f0e0c 100644
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--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
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+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
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@@ -13,6 +13,7 @@
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* uint64_t entry_addr;
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* uint64_t status;
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* uint64_t lpid;
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+* uint64_t os_arch;
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* };
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* we pad this struct to 64 bytes so each entry is in its own cacheline
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* the actual spin table is an array of these structures
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@@ -20,6 +21,7 @@
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#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
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#define SPIN_TABLE_ELEM_STATUS_IDX 1
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#define SPIN_TABLE_ELEM_LPID_IDX 2
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+#define SPIN_TABLE_ELEM_OS_ARCH_IDX 3
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#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */
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#define SPIN_TABLE_ELEM_SIZE 64
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@@ -35,4 +37,8 @@ phys_addr_t determine_mp_bootpg(void);
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void secondary_boot_func(void);
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int is_core_online(u64 cpu_id);
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#endif
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+
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+#define IH_ARCH_ARM 2 /* ARM */
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+#define IH_ARCH_ARM64 22 /* ARM64 */
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+
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#endif /* _FSL_LAYERSCAPE_MP_H */
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diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
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index 36f2cb0..aae8c5b 100644
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--- a/arch/arm/lib/bootm.c
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+++ b/arch/arm/lib/bootm.c
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@@ -258,6 +258,10 @@ bool armv7_boot_nonsec(void)
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}
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#endif
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+__weak void update_os_arch_secondary_cores(uint8_t os_arch)
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+{
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+}
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+
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/* Subcommand: GO */
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static void boot_jump_linux(bootm_headers_t *images, int flag)
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{
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@@ -276,6 +280,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
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announce_and_cleanup(fake);
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if (!fake) {
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+ update_os_arch_secondary_cores(images->os.arch);
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if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) &&
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(images->os.arch == IH_ARCH_ARM)) {
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smp_kick_all_cpus();
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--
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1.7.9.5
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