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38 lines
1007 B
Diff
38 lines
1007 B
Diff
From d94f8863307c0f7fb7aeb2084cc666c47991d78b Mon Sep 17 00:00:00 2001
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From: Biwen Li <biwen.li@nxp.com>
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Date: Mon, 19 Nov 2018 10:26:57 +0800
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Subject: [PATCH] clock: support layerscape
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This is an integrated patch of clock for layerscape
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Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
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Signed-off-by: Biwen Li <biwen.li@nxp.com>
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---
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drivers/clk/clk-qoriq.c | 9 ++++++++-
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1 file changed, 8 insertions(+), 1 deletion(-)
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--- a/drivers/clk/clk-qoriq.c
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+++ b/drivers/clk/clk-qoriq.c
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@@ -41,7 +41,7 @@ struct clockgen_pll_div {
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};
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struct clockgen_pll {
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- struct clockgen_pll_div div[4];
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+ struct clockgen_pll_div div[8];
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};
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#define CLKSEL_VALID 1
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@@ -1127,6 +1127,13 @@ static void __init create_one_pll(struct
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struct clk *clk;
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int ret;
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+ /*
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+ * For platform PLL, there are 8 divider clocks.
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+ * For core PLL, there are 4 divider clocks at most.
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+ */
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+ if (idx != 0 && i >= 4)
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+ break;
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+
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snprintf(pll->div[i].name, sizeof(pll->div[i].name),
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"cg-pll%d-div%d", idx, i + 1);
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