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209 lines
6.6 KiB
Diff
209 lines
6.6 KiB
Diff
From 621f2c4753b03170213e178cdafd66e78b212b3c Mon Sep 17 00:00:00 2001
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From: Biwen Li <biwen.li@nxp.com>
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Date: Tue, 30 Oct 2018 18:26:41 +0800
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Subject: [PATCH 27/40] kvm: support layerscape
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This is an integrated patch of kvm for layerscape
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Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Signed-off-by: Signed-off-by: Biwen Li <biwen.li@nxp.com>
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---
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arch/arm/include/asm/kvm_mmu.h | 3 +-
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arch/arm64/include/asm/kvm_mmu.h | 14 ++++++--
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arch/powerpc/kvm/booke.c | 5 +++
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virt/kvm/arm/mmu.c | 56 ++++++++++++++++++++++++++++++--
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virt/kvm/arm/vgic/vgic-its.c | 2 +-
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virt/kvm/arm/vgic/vgic-v2.c | 3 +-
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6 files changed, 74 insertions(+), 9 deletions(-)
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--- a/arch/arm/include/asm/kvm_mmu.h
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+++ b/arch/arm/include/asm/kvm_mmu.h
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@@ -55,7 +55,8 @@ void stage2_unmap_vm(struct kvm *kvm);
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int kvm_alloc_stage2_pgd(struct kvm *kvm);
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void kvm_free_stage2_pgd(struct kvm *kvm);
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable);
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot);
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int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
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--- a/arch/arm64/include/asm/kvm_mmu.h
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+++ b/arch/arm64/include/asm/kvm_mmu.h
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@@ -167,7 +167,8 @@ void stage2_unmap_vm(struct kvm *kvm);
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int kvm_alloc_stage2_pgd(struct kvm *kvm);
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void kvm_free_stage2_pgd(struct kvm *kvm);
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable);
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot);
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int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
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@@ -270,8 +271,15 @@ static inline void __coherent_cache_gues
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static inline void __kvm_flush_dcache_pte(pte_t pte)
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{
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- struct page *page = pte_page(pte);
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- kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
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+ if (pfn_valid(pte_pfn(pte))) {
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+ struct page *page = pte_page(pte);
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+ kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
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+ } else {
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+ void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE);
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+
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+ kvm_flush_dcache_to_poc(va, PAGE_SIZE);
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+ iounmap(va);
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+ }
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}
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static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
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--- a/arch/powerpc/kvm/booke.c
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+++ b/arch/powerpc/kvm/booke.c
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@@ -305,6 +305,11 @@ void kvmppc_core_queue_fpunavail(struct
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
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}
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+void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
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+{
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+ kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
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+}
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+
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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--- a/virt/kvm/arm/mmu.c
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+++ b/virt/kvm/arm/mmu.c
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@@ -1028,9 +1028,11 @@ static int stage2_pmdp_test_and_clear_yo
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* @guest_ipa: The IPA at which to insert the mapping
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* @pa: The physical address of the device
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* @size: The size of the mapping
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+ * @prot: S2 page translation bits
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*/
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable)
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot)
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{
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phys_addr_t addr, end;
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int ret = 0;
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@@ -1041,7 +1043,7 @@ int kvm_phys_addr_ioremap(struct kvm *kv
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pfn = __phys_to_pfn(pa);
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for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
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- pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
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+ pte_t pte = pfn_pte(pfn, prot);
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if (writable)
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pte = kvm_s2pte_mkwrite(pte);
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@@ -1065,6 +1067,30 @@ out:
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return ret;
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}
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+#ifdef CONFIG_ARM64
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+static pgprot_t stage1_to_stage2_pgprot(pgprot_t prot)
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+{
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+ switch (pgprot_val(prot) & PTE_ATTRINDX_MASK) {
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+ case PTE_ATTRINDX(MT_DEVICE_nGnRE):
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+ case PTE_ATTRINDX(MT_DEVICE_nGnRnE):
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+ case PTE_ATTRINDX(MT_DEVICE_GRE):
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+ return PAGE_S2_DEVICE;
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+ case PTE_ATTRINDX(MT_NORMAL_NC):
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+ case PTE_ATTRINDX(MT_NORMAL):
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+ return (pgprot_val(prot) & PTE_SHARED)
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+ ? PAGE_S2
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+ : PAGE_S2_NS;
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+ }
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+
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+ return PAGE_S2_DEVICE;
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+}
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+#else
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+static pgprot_t stage1_to_stage2_pgprot(pgprot_t prot)
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+{
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+ return PAGE_S2_DEVICE;
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+}
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+#endif
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+
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static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
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{
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kvm_pfn_t pfn = *pfnp;
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@@ -1341,6 +1367,18 @@ static int user_mem_abort(struct kvm_vcp
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hugetlb = true;
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gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
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} else {
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+ pte_t *pte;
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+ spinlock_t *ptl;
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+ pgprot_t prot;
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+
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+ pte = get_locked_pte(current->mm, memslot->userspace_addr, &ptl);
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+ prot = stage1_to_stage2_pgprot(__pgprot(pte_val(*pte)));
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+ pte_unmap_unlock(pte, ptl);
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+#ifdef CONFIG_ARM64
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+ if (pgprot_val(prot) == pgprot_val(PAGE_S2_NS))
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+ mem_type = PAGE_S2_NS;
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+#endif
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+
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/*
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* Pages belonging to memslots that don't have the same
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* alignment for userspace and IPA cannot be mapped using
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@@ -1382,6 +1420,11 @@ static int user_mem_abort(struct kvm_vcp
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if (is_error_noslot_pfn(pfn))
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return -EFAULT;
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+#ifdef CONFIG_ARM64
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+ if (pgprot_val(mem_type) == pgprot_val(PAGE_S2_NS)) {
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+ flags |= KVM_S2PTE_FLAG_IS_IOMAP;
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+ } else
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+#endif
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if (kvm_is_device_pfn(pfn)) {
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mem_type = PAGE_S2_DEVICE;
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flags |= KVM_S2PTE_FLAG_IS_IOMAP;
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@@ -1919,6 +1962,9 @@ int kvm_arch_prepare_memory_region(struc
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gpa_t gpa = mem->guest_phys_addr +
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(vm_start - mem->userspace_addr);
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phys_addr_t pa;
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+ pgprot_t prot;
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+ pte_t *pte;
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+ spinlock_t *ptl;
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pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
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pa += vm_start - vma->vm_start;
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@@ -1929,9 +1975,13 @@ int kvm_arch_prepare_memory_region(struc
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goto out;
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}
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+ pte = get_locked_pte(current->mm, mem->userspace_addr, &ptl);
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+ prot = stage1_to_stage2_pgprot(__pgprot(pte_val(*pte)));
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+ pte_unmap_unlock(pte, ptl);
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+
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ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
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vm_end - vm_start,
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- writable);
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+ writable, prot);
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if (ret)
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break;
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}
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--- a/virt/kvm/arm/vgic/vgic-its.c
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+++ b/virt/kvm/arm/vgic/vgic-its.c
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@@ -243,7 +243,7 @@ static struct its_ite *find_ite(struct v
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#define GIC_LPI_OFFSET 8192
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#define VITS_TYPER_IDBITS 16
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-#define VITS_TYPER_DEVBITS 16
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+#define VITS_TYPER_DEVBITS 17
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#define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
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#define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
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--- a/virt/kvm/arm/vgic/vgic-v2.c
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+++ b/virt/kvm/arm/vgic/vgic-v2.c
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@@ -307,7 +307,8 @@ int vgic_v2_map_resources(struct kvm *kv
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if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) {
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ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
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kvm_vgic_global_state.vcpu_base,
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- KVM_VGIC_V2_CPU_SIZE, true);
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+ KVM_VGIC_V2_CPU_SIZE, true,
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+ PAGE_S2_DEVICE);
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if (ret) {
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kvm_err("Unable to remap VGIC CPU to VCPU\n");
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goto out;
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