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71 lines
2.6 KiB
Diff
71 lines
2.6 KiB
Diff
From a968e9dc5983d258a4aa7e496d58c92e9e4cf670 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
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Date: Sat, 14 Sep 2013 21:37:59 -0300
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Subject: [PATCH] clk: composite: .determine_rate support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This commit adds .determine_rate support to the composite clock. It will
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use the .determine_rate callback from the rate component if available,
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and fall back on the mux component otherwise. This allows composite
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clocks to enjoy the benefits of automatic clock reparenting.
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Signed-off-by: Emilio López <emilio@elopez.com.ar>
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/clk/clk-composite.c | 28 ++++++++++++++++++++++++++++
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1 file changed, 28 insertions(+)
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--- a/drivers/clk/clk-composite.c
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+++ b/drivers/clk/clk-composite.c
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@@ -55,6 +55,30 @@ static unsigned long clk_composite_recal
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return rate_ops->recalc_rate(rate_hw, parent_rate);
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}
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+static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long *best_parent_rate,
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+ struct clk **best_parent_p)
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+{
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+ struct clk_composite *composite = to_clk_composite(hw);
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+ const struct clk_ops *rate_ops = composite->rate_ops;
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+ const struct clk_ops *mux_ops = composite->mux_ops;
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+ struct clk_hw *rate_hw = composite->rate_hw;
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+ struct clk_hw *mux_hw = composite->mux_hw;
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+
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+ if (rate_hw && rate_ops && rate_ops->determine_rate) {
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+ rate_hw->clk = hw->clk;
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+ return rate_ops->determine_rate(rate_hw, rate, best_parent_rate,
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+ best_parent_p);
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+ } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
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+ mux_hw->clk = hw->clk;
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+ return mux_ops->determine_rate(rate_hw, rate, best_parent_rate,
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+ best_parent_p);
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+ } else {
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+ pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
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+ return 0;
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+ }
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+}
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+
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static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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@@ -147,6 +171,8 @@ struct clk *clk_register_composite(struc
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composite->mux_ops = mux_ops;
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clk_composite_ops->get_parent = clk_composite_get_parent;
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clk_composite_ops->set_parent = clk_composite_set_parent;
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+ if (mux_ops->determine_rate)
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+ clk_composite_ops->determine_rate = clk_composite_determine_rate;
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}
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if (rate_hw && rate_ops) {
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@@ -170,6 +196,8 @@ struct clk *clk_register_composite(struc
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composite->rate_hw = rate_hw;
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composite->rate_ops = rate_ops;
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clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
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+ if (rate_ops->determine_rate)
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+ clk_composite_ops->determine_rate = clk_composite_determine_rate;
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}
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if (gate_hw && gate_ops) {
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