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67 lines
2.2 KiB
Diff
67 lines
2.2 KiB
Diff
--- a/arch/mips/ath79/dev-wmac.c 2017-02-12 19:49:21.158142253 +0100
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+++ b/arch/mips/ath79/dev-wmac.c 2017-02-12 21:01:51.206198122 +0100
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@@ -232,15 +274,27 @@ static void qca956x_wmac_setup(void)
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ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision;
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}
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+#define AR93XX_WMAC_SIZE \
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+ (soc_is_ar934x() ? AR934X_WMAC_SIZE : AR933X_WMAC_SIZE)
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+#define AR93XX_WMAC_BASE \
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+ (soc_is_ar934x() ? AR934X_WMAC_BASE : AR933X_WMAC_BASE)
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+
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+#define AR93XX_OTP_BASE \
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+ (soc_is_ar934x() ? AR934X_OTP_BASE : AR9300_OTP_BASE)
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+#define AR93XX_OTP_STATUS \
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+ (soc_is_ar934x() ? AR934X_OTP_STATUS : AR9300_OTP_STATUS)
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+#define AR93XX_OTP_READ_DATA \
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+ (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA)
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+
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static bool __init
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ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data)
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{
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int timeout = 1000;
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u32 val;
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- __raw_readl(base + AR9300_OTP_BASE + (4 * addr));
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+ __raw_readl(base + AR93XX_OTP_BASE + (4 * addr));
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while (timeout--) {
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- val = __raw_readl(base + AR9300_OTP_STATUS);
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+ val = __raw_readl(base + AR93XX_OTP_STATUS);
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if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID)
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break;
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@@ -250,7 +304,7 @@ ar93xx_wmac_otp_read_word(void __iomem *
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if (!timeout)
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return false;
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- *data = __raw_readl(base + AR9300_OTP_READ_DATA);
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+ *data = __raw_readl(base + AR93XX_OTP_READ_DATA);
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return true;
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}
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@@ -326,7 +380,7 @@ bool __init ar93xx_wmac_read_mac_address
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int mac_start = 2, mac_end = 8;
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BUG_ON(!soc_is_ar933x() && !soc_is_ar934x());
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- base = ioremap_nocache(AR933X_WMAC_BASE, AR933X_WMAC_SIZE);
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+ base = ioremap_nocache(AR93XX_WMAC_BASE, AR93XX_WMAC_SIZE);
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while (addr > sizeof(hdr)) {
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if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr)))
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break;
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2017-02-12 20:22:32.185209249 +0100
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2017-02-12 20:42:21.037382287 +0100
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@@ -172,6 +172,13 @@
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#define AR9300_OTP_STATUS_SM_BUSY 0x1
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#define AR9300_OTP_READ_DATA 0x15f1c
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+#define AR934X_OTP_BASE 0x30000
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+#define AR934X_OTP_STATUS 0x31018
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+#define AR934X_OTP_READ_DATA 0x3101c
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+#define AR934X_OTP_INTF2_ADDRESS 0x31008
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+#define AR934X_OTP_INTF3_ADDRESS 0x3100c
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+#define AR934X_OTP_PGENB_SETUP_HOLD_TIME_ADDRESS 0x31034
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+
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/*
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* Hidden Registers
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*/
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