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49 lines
1.6 KiB
Diff
49 lines
1.6 KiB
Diff
From 99afe6a0ee26f6e848fde5db3b32bc693d692764 Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Tue, 22 Dec 2015 20:13:08 +0000
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Subject: [PATCH] clk: bcm2835: added missing clock register definitions
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Added missing CTRL and DIV clock register definitions for:
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PCM, SLIM, TCNT, TEC, TD0, TD1
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Register information taken from:
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https://rawgit.com/msperl/rpi-registers/master/rpi-registers.html#CM
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which extracted the information from the header files shared by
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Broadcom/rpi foundation in this file:
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http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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(cherry picked from commit 2103a2156119b30f5924af2a1094227954be4617)
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---
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drivers/clk/bcm/clk-bcm2835.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -88,10 +88,23 @@
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#define CM_HSMDIV 0x08c
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#define CM_OTPCTL 0x090
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#define CM_OTPDIV 0x094
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+#define CM_PCMCTL 0x098
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+#define CM_PCMDIV 0x09c
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#define CM_PWMCTL 0x0a0
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#define CM_PWMDIV 0x0a4
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+#define CM_SLIMCTL 0x0a8
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+#define CM_SLIMDIV 0x0ac
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#define CM_SMICTL 0x0b0
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#define CM_SMIDIV 0x0b4
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+/* no definition for 0x0b8 and 0x0bc */
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+#define CM_TCNTCTL 0x0c0
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+#define CM_TCNTDIV 0x0c4
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+#define CM_TECCTL 0x0c8
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+#define CM_TECDIV 0x0cc
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+#define CM_TD0CTL 0x0d0
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+#define CM_TD0DIV 0x0d4
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+#define CM_TD1CTL 0x0d8
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+#define CM_TD1DIV 0x0dc
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#define CM_TSENSCTL 0x0e0
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#define CM_TSENSDIV 0x0e4
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#define CM_TIMERCTL 0x0e8
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