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202 lines
5.5 KiB
Diff
202 lines
5.5 KiB
Diff
--- a/drivers/phy/Kconfig
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+++ b/drivers/phy/Kconfig
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@@ -239,6 +239,11 @@
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help
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This option enables support for APM X-Gene SoC multi-purpose PHY.
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+config PHY_RALINK_USB
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+ tristate "Ralink USB PHY driver"
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+ select GENERIC_PHY
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+ depends on RALINK
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+
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config PHY_STIH407_USB
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tristate "STMicroelectronics USB2 picoPHY driver for STiH407 family"
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depends on RESET_CONTROLLER
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--- a/drivers/phy/Makefile
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+++ b/drivers/phy/Makefile
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@@ -31,3 +31,4 @@
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
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obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
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+obj-$(CONFIG_PHY_RALINK_USB) += phy-ralink-usb.o
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--- /dev/null
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+++ b/drivers/phy/phy-ralink-usb.c
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@@ -0,0 +1,177 @@
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+/*
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+ * Allwinner ralink USB phy driver
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+ *
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+ * Copyright (C) 2014 John Crispin <blogic@openwrt.org>
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+ *
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+ * Based on code from
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+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/mutex.h>
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+#include <linux/phy/phy.h>
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+#include <linux/platform_device.h>
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+#include <linux/reset.h>
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+#include <linux/of_platform.h>
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+
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+#include <asm/mach-ralink/ralink_regs.h>
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+
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+#define RT_SYSC_REG_SYSCFG1 0x014
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+#define RT_SYSC_REG_CLKCFG1 0x030
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+#define RT_SYSC_REG_USB_PHY_CFG 0x05c
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+
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+#define RT_RSTCTRL_UDEV BIT(25)
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+#define RT_RSTCTRL_UHST BIT(22)
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+#define RT_SYSCFG1_USB0_HOST_MODE BIT(10)
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+
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+#define MT7620_CLKCFG1_UPHY0_CLK_EN BIT(25)
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+#define MT7620_CLKCFG1_UPHY1_CLK_EN BIT(22)
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+#define RT_CLKCFG1_UPHY1_CLK_EN BIT(20)
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+#define RT_CLKCFG1_UPHY0_CLK_EN BIT(18)
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+
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+#define USB_PHY_UTMI_8B60M BIT(1)
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+#define UDEV_WAKEUP BIT(0)
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+
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+static atomic_t usb_pwr_ref = ATOMIC_INIT(0);
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+static struct reset_control *rstdev;
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+static struct reset_control *rsthost;
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+static u32 phy_clk;
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+static struct phy *rt_phy;
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+
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+static void usb_phy_enable(int state)
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+{
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+ if (state)
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+ rt_sysc_m32(0, phy_clk, RT_SYSC_REG_CLKCFG1);
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+ else
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+ rt_sysc_m32(phy_clk, 0, RT_SYSC_REG_CLKCFG1);
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+ mdelay(100);
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+}
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+
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+static int ralink_usb_phy_init(struct phy *_phy)
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+{
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+ return 0;
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+}
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+
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+static int ralink_usb_phy_exit(struct phy *_phy)
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+{
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+ return 0;
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+}
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+
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+static int ralink_usb_phy_power_on(struct phy *_phy)
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+{
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+ if (atomic_inc_return(&usb_pwr_ref) == 1) {
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+ int host = 1;
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+ u32 t;
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+
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+ usb_phy_enable(1);
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+
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+ if (host) {
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+ rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
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+ if (!IS_ERR(rsthost))
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+ reset_control_deassert(rsthost);
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+ if (!IS_ERR(rstdev))
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+ reset_control_deassert(rstdev);
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+ } else {
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+ rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
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+ if (!IS_ERR(rstdev))
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+ reset_control_deassert(rstdev);
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+ }
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+ mdelay(100);
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+
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+ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
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+ dev_info(&_phy->dev, "remote usb device wakeup %s\n",
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+ (t & UDEV_WAKEUP) ? ("enabbled") : ("disabled"));
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+ if (t & USB_PHY_UTMI_8B60M)
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+ dev_info(&_phy->dev, "UTMI 8bit 60MHz\n");
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+ else
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+ dev_info(&_phy->dev, "UTMI 16bit 30MHz\n");
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+ }
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+
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+ return 0;
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+}
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+
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+static int ralink_usb_phy_power_off(struct phy *_phy)
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+{
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+ if (atomic_dec_return(&usb_pwr_ref) == 0) {
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+ usb_phy_enable(0);
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+ if (!IS_ERR(rstdev))
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+ reset_control_assert(rstdev);
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+ if (!IS_ERR(rsthost))
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+ reset_control_assert(rsthost);
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+ }
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+
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+ return 0;
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+}
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+
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+static struct phy_ops ralink_usb_phy_ops = {
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+ .init = ralink_usb_phy_init,
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+ .exit = ralink_usb_phy_exit,
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+ .power_on = ralink_usb_phy_power_on,
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+ .power_off = ralink_usb_phy_power_off,
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+ .owner = THIS_MODULE,
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+};
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+
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+static struct phy *ralink_usb_phy_xlate(struct device *dev,
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+ struct of_phandle_args *args)
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+{
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+ return rt_phy;
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+}
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+
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+static const struct of_device_id ralink_usb_phy_of_match[] = {
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+ { .compatible = "ralink,rt3xxx-usbphy", .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN | RT_CLKCFG1_UPHY0_CLK_EN) },
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+ { .compatible = "ralink,mt7620a-usbphy", .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN | MT7620_CLKCFG1_UPHY0_CLK_EN) },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match);
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+
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+static int ralink_usb_phy_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct phy_provider *phy_provider;
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+ const struct of_device_id *match;
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+
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+ printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+ match = of_match_device(ralink_usb_phy_of_match, &pdev->dev);
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+ phy_clk = (int) match->data;
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+
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+ rsthost = devm_reset_control_get(&pdev->dev, "host");
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+ rstdev = devm_reset_control_get(&pdev->dev, "device");
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+
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+ rt_phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops, NULL);
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+ if (IS_ERR(rt_phy)) {
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+ dev_err(dev, "failed to create PHY\n");
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+ return PTR_ERR(rt_phy);
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+ }
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+
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+ phy_provider = devm_of_phy_provider_register(dev, ralink_usb_phy_xlate);
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+printk("%s:%s[%d]\n", __FILE__, __func__, __LINE__);
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+
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+ return PTR_ERR_OR_ZERO(phy_provider);
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+}
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+
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+static struct platform_driver ralink_usb_phy_driver = {
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+ .probe = ralink_usb_phy_probe,
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+ .driver = {
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+ .of_match_table = ralink_usb_phy_of_match,
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+ .name = "ralink-usb-phy",
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+ }
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+};
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+module_platform_driver(ralink_usb_phy_driver);
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+
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+MODULE_DESCRIPTION("Ralink USB phy driver");
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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+MODULE_LICENSE("GPL v2");
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