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5c5c60fec4
Fully reset the chip like on a full up/down, but without the PHY statemachine restart. Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48228 |
9 years ago | |
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| dsa | 10 years ago | |
| ethernet/atheros/ag71xx | 9 years ago | |