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571 lines
16 KiB
Diff
571 lines
16 KiB
Diff
--- a/drivers/regulator/Kconfig
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+++ b/drivers/regulator/Kconfig
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@@ -462,6 +462,14 @@ config REGULATOR_MT6397
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This driver supports the control of different power rails of device
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through regulator interface.
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+config REGULATOR_MXS
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+ tristate "Freescale MXS on-chip regulators"
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+ depends on (MXS_POWER || COMPILE_TEST)
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+ help
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+ Say y here to support Freescale MXS on-chip regulators.
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+ It is recommended that this option be enabled on i.MX23,
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+ i.MX28 platform.
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+
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config REGULATOR_PALMAS
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tristate "TI Palmas PMIC Regulators"
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depends on MFD_PALMAS
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--- a/drivers/regulator/Makefile
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+++ b/drivers/regulator/Makefile
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@@ -61,6 +61,7 @@ obj-$(CONFIG_REGULATOR_MC13892) += mc138
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obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o
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obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
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obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o
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+obj-$(CONFIG_REGULATOR_MXS) += mxs-regulator.o
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obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o
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obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
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obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o
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--- /dev/null
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+++ b/drivers/regulator/mxs-regulator.c
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@@ -0,0 +1,540 @@
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+/*
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+ * Freescale MXS on-chip regulators
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+ *
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+ * Embedded Alley Solutions, Inc <source@embeddedalley.com>
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+ *
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+ * Copyright (C) 2014 Stefan Wahren
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+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
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+ * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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+ *
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+ * Inspired by imx-bootlets
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+ */
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+
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+/*
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/device.h>
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+#include <linux/err.h>
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+#include <linux/kernel.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/regmap.h>
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+#include <linux/regulator/driver.h>
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+#include <linux/regulator/machine.h>
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+#include <linux/regulator/of_regulator.h>
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+#include <linux/slab.h>
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+
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+/* Powered by linear regulator. DCDC output is gated off and
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+ the linreg output is equal to the target. */
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+#define HW_POWER_LINREG_DCDC_OFF 1
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+
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+/* Powered by linear regulator. DCDC output is not gated off
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+ and is ready for the automatic hardware transistion after a 5V
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+ event. The converters are not enabled when 5V is present. LinReg output
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+ is 25mV below target. */
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+#define HW_POWER_LINREG_DCDC_READY 2
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+
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+/* Powered by DCDC converter and the LinReg is on. LinReg output
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+ is 25mV below target. */
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+#define HW_POWER_DCDC_LINREG_ON 3
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+
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+/* Powered by DCDC converter and the LinReg is off. LinReg output
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+ is 25mV below target. */
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+#define HW_POWER_DCDC_LINREG_OFF 4
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+
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+/* Powered by DCDC converter and the LinReg is ready for the
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+ automatic hardware transfer. The LinReg output is not enabled and
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+ depends on the 5V presence to enable the LinRegs. LinReg offset is 25mV
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+ below target. */
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+#define HW_POWER_DCDC_LINREG_READY 5
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+
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+/* Powered by an external source when 5V is present. This does not
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+ necessarily mean the external source is powered by 5V,but the chip needs
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+ to be aware that 5V is present. */
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+#define HW_POWER_EXTERNAL_SOURCE_5V 6
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+
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+/* Powered by an external source when 5V is not present.This doesn't
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+ necessarily mean the external source is powered by the battery, but the
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+ chip needs to be aware that the battery is present */
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+#define HW_POWER_EXTERNAL_SOURCE_BATTERY 7
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+
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+/* Unknown configuration. This is an error. */
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+#define HW_POWER_UNKNOWN_SOURCE 8
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+
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+/* TODO: Move power register offsets into header file */
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+#define HW_POWER_5VCTRL 0x00000010
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+#define HW_POWER_VDDDCTRL 0x00000040
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+#define HW_POWER_VDDACTRL 0x00000050
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+#define HW_POWER_VDDIOCTRL 0x00000060
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+#define HW_POWER_MISC 0x00000090
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+#define HW_POWER_STS 0x000000c0
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+
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+#define BM_POWER_STS_VBUSVALID0_STATUS BIT(15)
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+#define BM_POWER_STS_DC_OK BIT(9)
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+
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+#define BM_POWER_5VCTRL_ILIMIT_EQ_ZERO BIT(2)
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+#define BM_POWER_5VCTRL_ENABLE_DCDC BIT(0)
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+
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+#define BM_POWER_LINREG_OFFSET_DCDC_MODE BIT(1)
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+
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+#define SHIFT_FREQSEL 4
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+
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+#define BM_POWER_MISC_FREQSEL (7 << SHIFT_FREQSEL)
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+
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+/* Recommended DC-DC clock source values */
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+#define HW_POWER_MISC_FREQSEL_20000_KHZ 1
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+#define HW_POWER_MISC_FREQSEL_24000_KHZ 2
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+#define HW_POWER_MISC_FREQSEL_19200_KHZ 3
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+
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+#define HW_POWER_MISC_SEL_PLLCLK BIT(0)
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+
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+/* Regulator IDs */
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+#define MXS_DCDC 1
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+#define MXS_VDDIO 2
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+#define MXS_VDDA 3
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+#define MXS_VDDD 4
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+
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+struct mxs_reg_info {
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+ /* regulator descriptor */
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+ struct regulator_desc desc;
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+
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+ /* regulator control register */
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+ int ctrl_reg;
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+
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+ /* disable DC-DC output */
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+ unsigned int disable_fet_mask;
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+
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+ /* steps between linreg output and DC-DC target */
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+ unsigned int linreg_offset_mask;
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+ u8 linreg_offset_shift;
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+
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+ /* function which determine power source */
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+ u8 (*get_power_source)(struct regulator_dev *);
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+};
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+
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+static inline u8 get_linreg_offset(struct mxs_reg_info *ldo, u32 regs)
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+{
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+ return (regs & ldo->linreg_offset_mask) >> ldo->linreg_offset_shift;
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+}
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+
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+static u8 get_vddio_power_source(struct regulator_dev *reg)
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+{
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+ struct mxs_reg_info *ldo = rdev_get_drvdata(reg);
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+ u32 v5ctrl, status, base;
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+ u8 offset;
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+
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+ if (regmap_read(reg->regmap, HW_POWER_5VCTRL, &v5ctrl))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ if (regmap_read(reg->regmap, HW_POWER_STS, &status))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ if (regmap_read(reg->regmap, ldo->ctrl_reg, &base))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ offset = get_linreg_offset(ldo, base);
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+
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+ /* If VBUS valid then 5 V power supply present */
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+ if (status & BM_POWER_STS_VBUSVALID0_STATUS) {
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+ /* Powered by Linreg, DC-DC is off */
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+ if ((base & ldo->disable_fet_mask) &&
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+ !(offset & BM_POWER_LINREG_OFFSET_DCDC_MODE)) {
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+ return HW_POWER_LINREG_DCDC_OFF;
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+ }
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+
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+ if (v5ctrl & BM_POWER_5VCTRL_ENABLE_DCDC) {
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+ /* Powered by DC-DC, Linreg is on */
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+ if (offset & BM_POWER_LINREG_OFFSET_DCDC_MODE)
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+ return HW_POWER_DCDC_LINREG_ON;
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+ } else {
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+ /* Powered by Linreg, DC-DC is off */
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+ if (!(offset & BM_POWER_LINREG_OFFSET_DCDC_MODE))
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+ return HW_POWER_LINREG_DCDC_OFF;
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+ }
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+ } else {
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+ /* Powered by DC-DC, Linreg is on */
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+ if (offset & BM_POWER_LINREG_OFFSET_DCDC_MODE)
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+ return HW_POWER_DCDC_LINREG_ON;
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+ }
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+
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+ return HW_POWER_UNKNOWN_SOURCE;
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+}
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+
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+static u8 get_vdda_vddd_power_source(struct regulator_dev *reg)
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+{
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+ struct mxs_reg_info *ldo = rdev_get_drvdata(reg);
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+ struct regulator_desc *desc = &ldo->desc;
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+ u32 v5ctrl, status, base;
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+ u8 offset;
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+
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+ if (regmap_read(reg->regmap, HW_POWER_5VCTRL, &v5ctrl))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ if (regmap_read(reg->regmap, HW_POWER_STS, &status))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ if (regmap_read(reg->regmap, ldo->ctrl_reg, &base))
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+ return HW_POWER_UNKNOWN_SOURCE;
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+
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+ offset = get_linreg_offset(ldo, base);
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+
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+ /* DC-DC output is disabled */
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+ if (base & ldo->disable_fet_mask) {
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+ /* Powered by 5 V supply */
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+ if (status & BM_POWER_STS_VBUSVALID0_STATUS)
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+ return HW_POWER_EXTERNAL_SOURCE_5V;
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+
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+ /* Powered by Linreg, DC-DC is off */
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+ if (!(offset & BM_POWER_LINREG_OFFSET_DCDC_MODE))
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+ return HW_POWER_LINREG_DCDC_OFF;
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+ }
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+
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+ /* If VBUS valid then 5 V power supply present */
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+ if (status & BM_POWER_STS_VBUSVALID0_STATUS) {
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+ /* Powered by DC-DC, Linreg is on */
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+ if (v5ctrl & BM_POWER_5VCTRL_ENABLE_DCDC)
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+ return HW_POWER_DCDC_LINREG_ON;
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+
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+ /* Powered by Linreg, DC-DC is off */
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+ return HW_POWER_LINREG_DCDC_OFF;
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+ }
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+
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+ /* DC-DC is on */
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+ if (offset & BM_POWER_LINREG_OFFSET_DCDC_MODE) {
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+ /* Powered by DC-DC, Linreg is on */
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+ if (base & desc->enable_mask)
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+ return HW_POWER_DCDC_LINREG_ON;
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+
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+ /* Powered by DC-DC, Linreg is off */
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+ return HW_POWER_DCDC_LINREG_OFF;
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+ }
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+
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+ return HW_POWER_UNKNOWN_SOURCE;
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+}
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+
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+static int mxs_set_dcdc_freq(struct regulator_dev *reg, u32 hz)
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+{
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+ struct mxs_reg_info *dcdc = rdev_get_drvdata(reg);
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+ u32 val;
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+ int ret;
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+
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+ if (dcdc->desc.id != MXS_DCDC) {
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+ dev_warn(®->dev, "Setting switching freq is not supported\n");
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+ return -EINVAL;
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+ }
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+
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+ ret = regmap_read(reg->regmap, HW_POWER_MISC, &val);
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+ if (ret)
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+ return ret;
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+
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+ val &= ~BM_POWER_MISC_FREQSEL;
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+ val &= ~HW_POWER_MISC_SEL_PLLCLK;
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+
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+ /*
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+ * Select the PLL/PFD based frequency that the DC-DC converter uses.
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+ * The actual switching frequency driving the power inductor is
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+ * DCDC_CLK/16. Accept only values recommend by Freescale.
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+ */
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+ switch (hz) {
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+ case 1200000:
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+ val |= HW_POWER_MISC_FREQSEL_19200_KHZ << SHIFT_FREQSEL;
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+ break;
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+ case 1250000:
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+ val |= HW_POWER_MISC_FREQSEL_20000_KHZ << SHIFT_FREQSEL;
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+ break;
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+ case 1500000:
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+ val |= HW_POWER_MISC_FREQSEL_24000_KHZ << SHIFT_FREQSEL;
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+ break;
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+ default:
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+ dev_warn(®->dev, "Switching freq: %u Hz not supported\n",
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+ hz);
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+ return -EINVAL;
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+ }
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+
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+ /* First program FREQSEL */
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+ ret = regmap_write(reg->regmap, HW_POWER_MISC, val);
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+ if (ret)
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+ return ret;
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+
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+ /* then set PLL as clock for DC-DC converter */
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+ val |= HW_POWER_MISC_SEL_PLLCLK;
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+
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+ return regmap_write(reg->regmap, HW_POWER_MISC, val);
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+}
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+
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+static int mxs_ldo_set_voltage_sel(struct regulator_dev *reg, unsigned sel)
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+{
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+ struct mxs_reg_info *ldo = rdev_get_drvdata(reg);
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+ struct regulator_desc *desc = &ldo->desc;
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+ u32 status = 0;
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+ int timeout;
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+ int ret;
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+
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+ ret = regmap_update_bits(reg->regmap, desc->vsel_reg, desc->vsel_mask,
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+ sel);
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+ if (ret)
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+ return ret;
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+
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+ if (ldo->get_power_source) {
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+ switch (ldo->get_power_source(reg)) {
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+ case HW_POWER_LINREG_DCDC_OFF:
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+ case HW_POWER_LINREG_DCDC_READY:
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+ case HW_POWER_EXTERNAL_SOURCE_5V:
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+ /*
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+ * Since the DC-DC converter is off we can't
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+ * trigger on DC_OK. So wait at least 1 ms
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+ * for stabilization.
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+ */
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+ usleep_range(1000, 2000);
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+ return 0;
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+ }
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+ }
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+
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+ /* Make sure DC_OK has changed */
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+ usleep_range(15, 20);
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+
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+ for (timeout = 0; timeout < 20; timeout++) {
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+ ret = regmap_read(reg->regmap, HW_POWER_STS, &status);
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+
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+ if (ret)
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+ break;
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+
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+ /* DC-DC converter control loop has stabilized */
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+ if (status & BM_POWER_STS_DC_OK)
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+ return 0;
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+
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+ udelay(1);
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+ }
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+
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+ if (!ret)
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+ dev_warn_ratelimited(®->dev, "%s: timeout status=0x%08x\n",
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+ __func__, status);
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+
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+ msleep(20);
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+
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+ return -ETIMEDOUT;
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+}
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+
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+static int mxs_ldo_is_enabled(struct regulator_dev *reg)
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+{
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+ struct mxs_reg_info *ldo = rdev_get_drvdata(reg);
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+
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+ if (ldo->get_power_source) {
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+ switch (ldo->get_power_source(reg)) {
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+ case HW_POWER_LINREG_DCDC_OFF:
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+ case HW_POWER_LINREG_DCDC_READY:
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+ case HW_POWER_DCDC_LINREG_ON:
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+ return 1;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static struct regulator_ops mxs_dcdc_ops = {
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+ .is_enabled = regulator_is_enabled_regmap,
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+};
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+
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+static struct regulator_ops mxs_ldo_ops = {
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+ .list_voltage = regulator_list_voltage_linear,
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+ .map_voltage = regulator_map_voltage_linear,
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+ .set_voltage_sel = mxs_ldo_set_voltage_sel,
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+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
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+ .is_enabled = mxs_ldo_is_enabled,
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+};
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+
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+static const struct mxs_reg_info mxs_info_dcdc = {
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+ .desc = {
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+ .name = "dcdc",
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+ .id = MXS_DCDC,
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+ .type = REGULATOR_VOLTAGE,
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+ .owner = THIS_MODULE,
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+ .ops = &mxs_dcdc_ops,
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+ .enable_reg = HW_POWER_STS,
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+ .enable_mask = (1 << 0),
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+ },
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+};
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+
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+static const struct mxs_reg_info imx23_info_vddio = {
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+ .desc = {
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+ .name = "vddio",
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+ .id = MXS_VDDIO,
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+ .type = REGULATOR_VOLTAGE,
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+ .owner = THIS_MODULE,
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+ .n_voltages = 0x20,
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+ .uV_step = 25000,
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+ .linear_min_sel = 0,
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+ .min_uV = 2800000,
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+ .vsel_reg = HW_POWER_VDDIOCTRL,
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+ .vsel_mask = 0x1f,
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+ .ops = &mxs_ldo_ops,
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+ },
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+ .ctrl_reg = HW_POWER_VDDIOCTRL,
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+ .disable_fet_mask = 1 << 16,
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+ .linreg_offset_mask = 3 << 12,
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+ .linreg_offset_shift = 12,
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+ .get_power_source = get_vddio_power_source,
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+};
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+
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+static const struct mxs_reg_info imx28_info_vddio = {
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+ .desc = {
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+ .name = "vddio",
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+ .id = MXS_VDDIO,
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+ .type = REGULATOR_VOLTAGE,
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+ .owner = THIS_MODULE,
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+ .n_voltages = 0x11,
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+ .uV_step = 50000,
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+ .linear_min_sel = 0,
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+ .min_uV = 2800000,
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+ .vsel_reg = HW_POWER_VDDIOCTRL,
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+ .vsel_mask = 0x1f,
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+ .ops = &mxs_ldo_ops,
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+ },
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+ .ctrl_reg = HW_POWER_VDDIOCTRL,
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+ .disable_fet_mask = 1 << 16,
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+ .linreg_offset_mask = 3 << 12,
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+ .linreg_offset_shift = 12,
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+ .get_power_source = get_vddio_power_source,
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+};
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+
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+static const struct mxs_reg_info mxs_info_vdda = {
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+ .desc = {
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+ .name = "vdda",
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+ .id = MXS_VDDA,
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+ .type = REGULATOR_VOLTAGE,
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+ .owner = THIS_MODULE,
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+ .n_voltages = 0x20,
|
|
+ .uV_step = 25000,
|
|
+ .linear_min_sel = 0,
|
|
+ .min_uV = 1500000,
|
|
+ .vsel_reg = HW_POWER_VDDACTRL,
|
|
+ .vsel_mask = 0x1f,
|
|
+ .ops = &mxs_ldo_ops,
|
|
+ .enable_mask = (1 << 17),
|
|
+ },
|
|
+ .ctrl_reg = HW_POWER_VDDACTRL,
|
|
+ .disable_fet_mask = 1 << 16,
|
|
+ .linreg_offset_mask = 3 << 12,
|
|
+ .linreg_offset_shift = 12,
|
|
+ .get_power_source = get_vdda_vddd_power_source,
|
|
+};
|
|
+
|
|
+static const struct mxs_reg_info mxs_info_vddd = {
|
|
+ .desc = {
|
|
+ .name = "vddd",
|
|
+ .id = MXS_VDDD,
|
|
+ .type = REGULATOR_VOLTAGE,
|
|
+ .owner = THIS_MODULE,
|
|
+ .n_voltages = 0x20,
|
|
+ .uV_step = 25000,
|
|
+ .linear_min_sel = 0,
|
|
+ .min_uV = 800000,
|
|
+ .vsel_reg = HW_POWER_VDDDCTRL,
|
|
+ .vsel_mask = 0x1f,
|
|
+ .ops = &mxs_ldo_ops,
|
|
+ .enable_mask = (1 << 21),
|
|
+ },
|
|
+ .ctrl_reg = HW_POWER_VDDDCTRL,
|
|
+ .disable_fet_mask = 1 << 20,
|
|
+ .linreg_offset_mask = 3 << 16,
|
|
+ .linreg_offset_shift = 16,
|
|
+ .get_power_source = get_vdda_vddd_power_source,
|
|
+};
|
|
+
|
|
+static const struct of_device_id of_mxs_regulator_match[] = {
|
|
+ { .compatible = "fsl,imx23-dcdc", .data = &mxs_info_dcdc },
|
|
+ { .compatible = "fsl,imx28-dcdc", .data = &mxs_info_dcdc },
|
|
+ { .compatible = "fsl,imx23-vddio", .data = &imx23_info_vddio },
|
|
+ { .compatible = "fsl,imx23-vdda", .data = &mxs_info_vdda },
|
|
+ { .compatible = "fsl,imx23-vddd", .data = &mxs_info_vddd },
|
|
+ { .compatible = "fsl,imx28-vddio", .data = &imx28_info_vddio },
|
|
+ { .compatible = "fsl,imx28-vdda", .data = &mxs_info_vdda },
|
|
+ { .compatible = "fsl,imx28-vddd", .data = &mxs_info_vddd },
|
|
+ { /* end */ }
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, of_mxs_regulator_match);
|
|
+
|
|
+static int mxs_regulator_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct device *dev = &pdev->dev;
|
|
+ const struct of_device_id *match;
|
|
+ struct device_node *parent_np;
|
|
+ struct regulator_dev *rdev = NULL;
|
|
+ struct mxs_reg_info *info;
|
|
+ struct regulator_init_data *initdata;
|
|
+ struct regulator_config config = { };
|
|
+ u32 switch_freq;
|
|
+
|
|
+ match = of_match_device(of_mxs_regulator_match, dev);
|
|
+ if (!match) {
|
|
+ /* We do not expect this to happen */
|
|
+ dev_err(dev, "%s: Unable to match device\n", __func__);
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ info = devm_kmemdup(dev, match->data, sizeof(struct mxs_reg_info),
|
|
+ GFP_KERNEL);
|
|
+ if (!info)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ initdata = of_get_regulator_init_data(dev, dev->of_node, &info->desc);
|
|
+ if (!initdata) {
|
|
+ dev_err(dev, "missing regulator init data\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ parent_np = of_get_parent(dev->of_node);
|
|
+ if (!parent_np)
|
|
+ return -ENODEV;
|
|
+ config.regmap = syscon_node_to_regmap(parent_np);
|
|
+ of_node_put(parent_np);
|
|
+ if (IS_ERR(config.regmap))
|
|
+ return PTR_ERR(config.regmap);
|
|
+
|
|
+ config.dev = dev;
|
|
+ config.init_data = initdata;
|
|
+ config.driver_data = info;
|
|
+ config.of_node = dev->of_node;
|
|
+
|
|
+ rdev = devm_regulator_register(dev, &info->desc, &config);
|
|
+ if (IS_ERR(rdev)) {
|
|
+ int ret = PTR_ERR(rdev);
|
|
+
|
|
+ dev_err(dev, "%s: failed to register regulator(%d)\n",
|
|
+ __func__, ret);
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ if (!of_property_read_u32(dev->of_node, "switching-frequency",
|
|
+ &switch_freq))
|
|
+ mxs_set_dcdc_freq(rdev, switch_freq);
|
|
+
|
|
+ platform_set_drvdata(pdev, rdev);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver mxs_regulator_driver = {
|
|
+ .driver = {
|
|
+ .name = "mxs_regulator",
|
|
+ .of_match_table = of_mxs_regulator_match,
|
|
+ },
|
|
+ .probe = mxs_regulator_probe,
|
|
+};
|
|
+
|
|
+module_platform_driver(mxs_regulator_driver);
|
|
+
|
|
+MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
|
|
+MODULE_DESCRIPTION("Freescale MXS regulators");
|
|
+MODULE_LICENSE("GPL v2");
|
|
+MODULE_ALIAS("platform:mxs_regulator");
|