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06ac2f5c74
On BCM5301X there are two different cases to handle: CPU port 8 vs. any other one. Support for CPU port 8 was already partially implemented but it lacked setting some extra bit for 2G speed. It also will need to be extended to implement "SMP dual core 3 GMAC setup". That's the reason for handling it in separated code block. This patch also adds overriding CPU port state for port other than 8. It requires using recently defined GMII_PORT registers. It was tested for regressions on BCM53011 revs 2 & 3. It was also confirmed to fix switch on some internal Broadcom board. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45402 |
9 years ago | |
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| .. | ||
| Documentation/networking | 11 years ago | |
| arch/mips/fw/myloader | 14 years ago | |
| crypto/ocf | 10 years ago | |
| drivers | 9 years ago | |
| fs/yaffs2 | 9 years ago | |
| include | 10 years ago | |