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136 lines
4.3 KiB
Diff
136 lines
4.3 KiB
Diff
From 3282055a7d0a304d541dbdbe2e32167e1a2f117c Mon Sep 17 00:00:00 2001
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From: Boris BREZILLON <boris.brezillon@free-electrons.com>
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Date: Mon, 28 Jul 2014 14:20:54 +0200
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Subject: [PATCH] mtd: nand: Take nand_ecc_ctrl initialization out of
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nand_scan_tail
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Take ECC initialization code portion out of nand_scan_tail so that we can
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re-use this implementation.
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This commit only moves some code around and makes no functional changes.
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Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/mtd/nand/nand_base.c | 91 +++++++++++++++++++++++++++-----------------
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1 file changed, 56 insertions(+), 35 deletions(-)
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--- a/drivers/mtd/nand/nand_base.c
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+++ b/drivers/mtd/nand/nand_base.c
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@@ -3892,42 +3892,15 @@ static bool nand_ecc_strength_good(struc
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return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
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}
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-/**
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- * nand_scan_tail - [NAND Interface] Scan for the NAND device
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- * @mtd: MTD device structure
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- *
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- * This is the second phase of the normal nand_scan() function. It fills out
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- * all the uninitialized function pointers with the defaults and scans for a
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- * bad block table if appropriate.
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+/*
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+ * Initialize ECC struct:
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+ * - fill ECC struct with default function/values when these ones are undefined
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+ * - fill ECC infos based on MTD device
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*/
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-int nand_scan_tail(struct mtd_info *mtd)
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+static int nand_ecc_ctrl_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc)
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{
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int i;
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- struct nand_chip *chip = mtd->priv;
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- struct nand_ecc_ctrl *ecc = &chip->ecc;
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- struct nand_buffers *nbuf;
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- /* New bad blocks should be marked in OOB, flash-based BBT, or both */
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- BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
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- !(chip->bbt_options & NAND_BBT_USE_FLASH));
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-
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- if (!(chip->options & NAND_OWN_BUFFERS)) {
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- nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize
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- + mtd->oobsize * 3, GFP_KERNEL);
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- if (!nbuf)
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- return -ENOMEM;
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- nbuf->ecccalc = (uint8_t *)(nbuf + 1);
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- nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;
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- nbuf->databuf = nbuf->ecccode + mtd->oobsize;
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-
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- chip->buffers = nbuf;
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- } else {
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- if (!chip->buffers)
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- return -ENOMEM;
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- }
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-
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- /* Set the internal oob buffer location, just after the page data */
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- chip->oob_poi = chip->buffers->databuf + mtd->writesize;
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/*
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* If no default placement scheme is given, select an appropriate one.
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@@ -3953,9 +3926,6 @@ int nand_scan_tail(struct mtd_info *mtd)
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}
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}
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- if (!chip->write_page)
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- chip->write_page = nand_write_page;
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-
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/*
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* Check ECC mode, default to software if 3byte/512byte hardware ECC is
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* selected and we have 256 byte pagesize fallback to software ECC
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@@ -4125,6 +4095,57 @@ int nand_scan_tail(struct mtd_info *mtd)
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}
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ecc->total = ecc->steps * ecc->bytes;
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+ return 0;
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+}
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+
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+/**
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+ * nand_scan_tail - [NAND Interface] Scan for the NAND device
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+ * @mtd: MTD device structure
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+ *
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+ * This is the second phase of the normal nand_scan() function. It fills out
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+ * all the uninitialized function pointers with the defaults and scans for a
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+ * bad block table if appropriate.
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+ */
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+int nand_scan_tail(struct mtd_info *mtd)
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+{
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+ int ret;
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+ struct nand_chip *chip = mtd->priv;
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+ struct nand_ecc_ctrl *ecc = &chip->ecc;
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+ struct nand_buffers *nbuf;
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+
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+ /* New bad blocks should be marked in OOB, flash-based BBT, or both */
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+ BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
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+ !(chip->bbt_options & NAND_BBT_USE_FLASH));
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+
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+ if (!(chip->options & NAND_OWN_BUFFERS)) {
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+ nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize
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+ + mtd->oobsize * 3, GFP_KERNEL);
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+ if (!nbuf)
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+ return -ENOMEM;
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+ nbuf->ecccalc = (uint8_t *)(nbuf + 1);
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+ nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;
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+ nbuf->databuf = nbuf->ecccode + mtd->oobsize;
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+ chip->buffers = nbuf;
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+ } else {
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+ if (!chip->buffers)
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+ return -ENOMEM;
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+ }
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+
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+ /* Set the internal oob buffer location, just after the page data */
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+ chip->oob_poi = chip->buffers->databuf + mtd->writesize;
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+
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+ if (!chip->write_page)
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+ chip->write_page = nand_write_page;
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+
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+ /* Initialize ECC struct */
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+ ret = nand_ecc_ctrl_init(mtd, ecc);
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+ if (ret) {
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+ if (!(chip->options & NAND_OWN_BUFFERS))
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+ kfree(chip->buffers);
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+
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+ return ret;
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+ }
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+
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/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
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if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
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switch (ecc->steps) {
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