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170 lines
4.6 KiB
C
170 lines
4.6 KiB
C
/*
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* Ralink RT305x SoC specific definitions
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*
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* Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* Parts of this file are based on Ralink's 2.6.21 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef _RT305X_H_
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#define _RT305X_H_
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#include <linux/init.h>
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#include <linux/io.h>
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enum rt305x_soc_type {
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RT305X_SOC_UNKNOWN = 0,
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RT305X_SOC_RT3050,
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RT305X_SOC_RT3052,
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RT305X_SOC_RT3350,
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RT305X_SOC_RT3352,
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RT305X_SOC_RT5350,
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};
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extern enum rt305x_soc_type rt305x_soc;
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static inline int soc_is_rt3050(void)
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{
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return rt305x_soc == RT305X_SOC_RT3050;
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}
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static inline int soc_is_rt3052(void)
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{
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return rt305x_soc == RT305X_SOC_RT3052;
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}
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static inline int soc_is_rt305x(void)
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{
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return soc_is_rt3050() || soc_is_rt3052();
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}
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static inline int soc_is_rt3350(void)
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{
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return rt305x_soc == RT305X_SOC_RT3350;
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}
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static inline int soc_is_rt3352(void)
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{
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return rt305x_soc == RT305X_SOC_RT3352;
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}
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static inline int soc_is_rt5350(void)
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{
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return rt305x_soc == RT305X_SOC_RT5350;
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}
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#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
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#define RT3352_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT3352_MEM_SIZE_MAX (256 * 1024 * 1024)
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#define RT305X_CPU_IRQ_BASE 0
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#define RT305X_INTC_IRQ_BASE 8
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#define RT305X_INTC_IRQ_COUNT 32
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#define RT305X_GPIO_IRQ_BASE 40
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#define RT305X_CPU_IRQ_INTC (RT305X_CPU_IRQ_BASE + 2)
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#define RT305X_CPU_IRQ_FE (RT305X_CPU_IRQ_BASE + 5)
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#define RT305X_CPU_IRQ_WNIC (RT305X_CPU_IRQ_BASE + 6)
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#define RT305X_CPU_IRQ_COUNTER (RT305X_CPU_IRQ_BASE + 7)
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#define RT305X_INTC_IRQ_SYSCTL (RT305X_INTC_IRQ_BASE + 0)
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#define RT305X_INTC_IRQ_TIMER0 (RT305X_INTC_IRQ_BASE + 1)
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#define RT305X_INTC_IRQ_TIMER1 (RT305X_INTC_IRQ_BASE + 2)
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#define RT305X_INTC_IRQ_IA (RT305X_INTC_IRQ_BASE + 3)
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#define RT305X_INTC_IRQ_PCM (RT305X_INTC_IRQ_BASE + 4)
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#define RT305X_INTC_IRQ_UART0 (RT305X_INTC_IRQ_BASE + 5)
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#define RT305X_INTC_IRQ_PIO (RT305X_INTC_IRQ_BASE + 6)
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#define RT305X_INTC_IRQ_DMA (RT305X_INTC_IRQ_BASE + 7)
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#define RT305X_INTC_IRQ_NAND (RT305X_INTC_IRQ_BASE + 8)
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#define RT305X_INTC_IRQ_PERFC (RT305X_INTC_IRQ_BASE + 9)
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#define RT305X_INTC_IRQ_I2S (RT305X_INTC_IRQ_BASE + 10)
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#define RT305X_INTC_IRQ_UART1 (RT305X_INTC_IRQ_BASE + 12)
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#define RT305X_INTC_IRQ_ESW (RT305X_INTC_IRQ_BASE + 17)
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#define RT305X_INTC_IRQ_OTG (RT305X_INTC_IRQ_BASE + 18)
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extern void __iomem *rt305x_sysc_base;
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extern void __iomem *rt305x_memc_base;
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static inline void rt305x_sysc_wr(u32 val, unsigned reg)
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{
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__raw_writel(val, rt305x_sysc_base + reg);
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}
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static inline u32 rt305x_sysc_rr(unsigned reg)
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{
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return __raw_readl(rt305x_sysc_base + reg);
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}
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static inline void rt305x_memc_wr(u32 val, unsigned reg)
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{
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__raw_writel(val, rt305x_memc_base + reg);
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}
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static inline u32 rt305x_memc_rr(unsigned reg)
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{
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return __raw_readl(rt305x_memc_base + reg);
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}
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#define RT305X_GPIO_I2C_SD 1
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#define RT305X_GPIO_I2C_SCLK 2
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#define RT305X_GPIO_SPI_EN 3
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#define RT305X_GPIO_SPI_CLK 4
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#define RT305X_GPIO_SPI_DOUT 5
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#define RT305X_GPIO_SPI_DIN 6
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/* GPIO 7-14 is shared between UART0, PCM and I2S interfaces */
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#define RT305X_GPIO_7 7
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#define RT305X_GPIO_8 8
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#define RT305X_GPIO_9 9
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#define RT305X_GPIO_10 10
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#define RT305X_GPIO_11 11
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#define RT305X_GPIO_12 12
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#define RT305X_GPIO_13 13
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#define RT305X_GPIO_14 14
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#define RT305X_GPIO_UART1_TXD 15
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#define RT305X_GPIO_UART1_RXD 16
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#define RT305X_GPIO_JTAG_TDO 17
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#define RT305X_GPIO_JTAG_TDI 18
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#define RT305X_GPIO_JTAG_TMS 19
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#define RT305X_GPIO_JTAG_TCLK 20
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#define RT305X_GPIO_JTAG_TRST_N 21
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#define RT305X_GPIO_MDIO_MDC 22
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#define RT305X_GPIO_MDIO_MDIO 23
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#define RT305X_GPIO_SDRAM_MD16 24
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#define RT305X_GPIO_SDRAM_MD17 25
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#define RT305X_GPIO_SDRAM_MD18 26
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#define RT305X_GPIO_SDRAM_MD19 27
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#define RT305X_GPIO_SDRAM_MD20 28
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#define RT305X_GPIO_SDRAM_MD21 29
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#define RT305X_GPIO_SDRAM_MD22 30
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#define RT305X_GPIO_SDRAM_MD23 31
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#define RT305X_GPIO_SDRAM_MD24 32
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#define RT305X_GPIO_SDRAM_MD25 33
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#define RT305X_GPIO_SDRAM_MD26 34
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#define RT305X_GPIO_SDRAM_MD27 35
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#define RT305X_GPIO_SDRAM_MD28 36
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#define RT305X_GPIO_SDRAM_MD29 37
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#define RT305X_GPIO_SDRAM_MD30 38
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#define RT305X_GPIO_SDRAM_MD31 39
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#define RT305X_GPIO_GE0_TXD0 40
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#define RT305X_GPIO_GE0_TXD1 41
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#define RT305X_GPIO_GE0_TXD2 42
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#define RT305X_GPIO_GE0_TXD3 43
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#define RT305X_GPIO_GE0_TXEN 44
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#define RT305X_GPIO_GE0_TXCLK 45
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#define RT305X_GPIO_GE0_RXD0 46
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#define RT305X_GPIO_GE0_RXD1 47
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#define RT305X_GPIO_GE0_RXD2 48
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#define RT305X_GPIO_GE0_RXD3 49
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#define RT305X_GPIO_GE0_RXDV 50
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#define RT305X_GPIO_GE0_RXCLK 51
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void rt305x_gpio_init(u32 mode);
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#endif /* _RT305X_H_ */
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