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75 lines
2.2 KiB
Diff
75 lines
2.2 KiB
Diff
From dec551d2301f71a692ed1729a323c8259d36f849 Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linus.walleij@linaro.org>
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Date: Wed, 11 Oct 2017 19:49:13 +0200
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Subject: [PATCH 15/31] ARM: dts: Add PCI to WBD111 and WBD222
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These two boards have mini-PCI card slots, so enable PCI
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on both of them.
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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arch/arm/boot/dts/gemini-wbd111.dts | 22 ++++++++++++++++++++++
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arch/arm/boot/dts/gemini-wbd222.dts | 22 ++++++++++++++++++++++
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2 files changed, 44 insertions(+)
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--- a/arch/arm/boot/dts/gemini-wbd111.dts
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+++ b/arch/arm/boot/dts/gemini-wbd111.dts
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@@ -138,5 +138,27 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_default_pins>;
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};
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+
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+ pci@50000000 {
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+ status = "okay";
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+ interrupt-map-mask = <0xf800 0 0 7>;
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+ interrupt-map =
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+ <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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+ <0x4800 0 0 2 &pci_intc 1>,
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+ <0x4800 0 0 3 &pci_intc 2>,
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+ <0x4800 0 0 4 &pci_intc 3>,
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+ <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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+ <0x5000 0 0 2 &pci_intc 2>,
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+ <0x5000 0 0 3 &pci_intc 3>,
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+ <0x5000 0 0 4 &pci_intc 0>,
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+ <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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+ <0x5800 0 0 2 &pci_intc 3>,
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+ <0x5800 0 0 3 &pci_intc 0>,
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+ <0x5800 0 0 4 &pci_intc 1>,
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+ <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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+ <0x6000 0 0 2 &pci_intc 0>,
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+ <0x6000 0 0 3 &pci_intc 1>,
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+ <0x6000 0 0 4 &pci_intc 2>;
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+ };
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};
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};
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--- a/arch/arm/boot/dts/gemini-wbd222.dts
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+++ b/arch/arm/boot/dts/gemini-wbd222.dts
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@@ -143,5 +143,27 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_default_pins>;
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};
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+
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+ pci@50000000 {
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+ status = "okay";
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+ interrupt-map-mask = <0xf800 0 0 7>;
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+ interrupt-map =
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+ <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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+ <0x4800 0 0 2 &pci_intc 1>,
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+ <0x4800 0 0 3 &pci_intc 2>,
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+ <0x4800 0 0 4 &pci_intc 3>,
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+ <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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+ <0x5000 0 0 2 &pci_intc 2>,
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+ <0x5000 0 0 3 &pci_intc 3>,
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+ <0x5000 0 0 4 &pci_intc 0>,
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+ <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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+ <0x5800 0 0 2 &pci_intc 3>,
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+ <0x5800 0 0 3 &pci_intc 0>,
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+ <0x5800 0 0 4 &pci_intc 1>,
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+ <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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+ <0x6000 0 0 2 &pci_intc 0>,
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+ <0x6000 0 0 3 &pci_intc 1>,
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+ <0x6000 0 0 4 &pci_intc 2>;
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+ };
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};
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};
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