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77 lines
2.8 KiB
Diff
77 lines
2.8 KiB
Diff
From bdecfcdb5461834aab24002bb18d3cbdd907b7fb Mon Sep 17 00:00:00 2001
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From: Huang Rui <ray.huang@amd.com>
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Date: Mon, 23 Nov 2015 18:07:35 +0800
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Subject: [PATCH] sp5100_tco: fix the device check for SB800 and later chipsets
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For SB800 and later chipsets, the register definitions are the same
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with SB800. And for SB700 and older chipsets, the definitions should
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be same with SP5100/SB7x0.
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Signed-off-by: Huang Rui <ray.huang@amd.com>
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Cc: Denis Turischev <denis.turischev@compulab.co.il>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/sp5100_tco.c | 28 ++++++++++++++++------------
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1 file changed, 16 insertions(+), 12 deletions(-)
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--- a/drivers/watchdog/sp5100_tco.c
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+++ b/drivers/watchdog/sp5100_tco.c
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@@ -335,21 +335,24 @@ static unsigned char sp5100_tco_setupdev
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if (!sp5100_tco_pci)
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return 0;
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- pr_info("PCI Revision ID: 0x%x\n", sp5100_tco_pci->revision);
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+ pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n",
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+ sp5100_tco_pci->vendor, sp5100_tco_pci->device,
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+ sp5100_tco_pci->revision);
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/*
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* Determine type of southbridge chipset.
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*/
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- if (sp5100_tco_pci->revision >= 0x40) {
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- dev_name = SB800_DEVNAME;
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- index_reg = SB800_IO_PM_INDEX_REG;
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- data_reg = SB800_IO_PM_DATA_REG;
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- base_addr = SB800_PM_WATCHDOG_BASE;
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- } else {
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+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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+ sp5100_tco_pci->revision < 0x40) {
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dev_name = SP5100_DEVNAME;
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index_reg = SP5100_IO_PM_INDEX_REG;
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data_reg = SP5100_IO_PM_DATA_REG;
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base_addr = SP5100_PM_WATCHDOG_BASE;
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+ } else {
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+ dev_name = SB800_DEVNAME;
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+ index_reg = SB800_IO_PM_INDEX_REG;
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+ data_reg = SB800_IO_PM_DATA_REG;
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+ base_addr = SB800_PM_WATCHDOG_BASE;
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}
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/* Request the IO ports used by this driver */
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@@ -385,7 +388,12 @@ static unsigned char sp5100_tco_setupdev
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* Secondly, Find the watchdog timer MMIO address
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* from SBResource_MMIO register.
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*/
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- if (sp5100_tco_pci->revision >= 0x40) {
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+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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+ sp5100_tco_pci->revision < 0x40) {
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+ /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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+ pci_read_config_dword(sp5100_tco_pci,
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+ SP5100_SB_RESOURCE_MMIO_BASE, &val);
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+ } else {
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/* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
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outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG);
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val = inb(SB800_IO_PM_DATA_REG);
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@@ -395,10 +403,6 @@ static unsigned char sp5100_tco_setupdev
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG);
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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- } else {
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- /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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- pci_read_config_dword(sp5100_tco_pci,
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- SP5100_SB_RESOURCE_MMIO_BASE, &val);
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}
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/* The SBResource_MMIO is enabled and mapped memory space? */
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