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59 lines
1.8 KiB
Diff
59 lines
1.8 KiB
Diff
From dab463aa0dbd5ac45403dade2723046eba214359 Mon Sep 17 00:00:00 2001
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From: Nicolas Boullis <nboullis@debian.org>
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Date: Sun, 10 Apr 2016 13:23:05 +0200
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Subject: [PATCH] rtc: ds1307: ensure that any pending alarm is cleared before
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a new alarm is enabled
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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If a previously-set alarm was disabled and then triggered, it may still
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be pending when a new alarm is configured.
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Then, if the alarm is enabled before the pending alarm is cleared, then
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an interrupt is immediately raised.
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Unfortunately, when the alarm is cleared and enabled during the same I²C
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block write, the chip (at least the DS1339 I have) considers that the
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alarm is enabled before it is cleared, and raises an interrupt.
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This patch ensures that the pending alarm is cleared before the alarm is
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enabled.
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Signed-off-by: Nicolas Boullis <nboullis@debian.org>
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Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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---
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drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
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1 file changed, 8 insertions(+), 5 deletions(-)
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--- a/drivers/rtc/rtc-ds1307.c
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+++ b/drivers/rtc/rtc-ds1307.c
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@@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
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buf[5] = 0;
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buf[6] = 0;
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- /* optionally enable ALARM1 */
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+ /* disable alarms */
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buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
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- if (t->enabled) {
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- dev_dbg(dev, "alarm IRQ armed\n");
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- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
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- }
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buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
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ret = ds1307->write_block_data(client,
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@@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
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return ret;
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}
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+ /* optionally enable ALARM1 */
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+ if (t->enabled) {
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+ dev_dbg(dev, "alarm IRQ armed\n");
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+ buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
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+ i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
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+ }
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+
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return 0;
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}
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