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120 lines
2.8 KiB
Diff
120 lines
2.8 KiB
Diff
From 07741f61fc94fad3c3d21fa1a2ad6f01455cc1dd Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Fri, 12 Apr 2013 06:27:41 +0000
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Subject: [PATCH 120/137] DT: MIPS: ralink: add MT7620A dts files
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Add a dtsi file for MT7620A SoC and a sample dts file.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Patchwork: http://patchwork.linux-mips.org/patch/5190/
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---
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arch/mips/ralink/Kconfig | 4 +++
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arch/mips/ralink/dts/Makefile | 1 +
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arch/mips/ralink/dts/mt7620a.dtsi | 58 +++++++++++++++++++++++++++++++++
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arch/mips/ralink/dts/mt7620a_eval.dts | 16 +++++++++
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4 files changed, 79 insertions(+)
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create mode 100644 arch/mips/ralink/dts/mt7620a.dtsi
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create mode 100644 arch/mips/ralink/dts/mt7620a_eval.dts
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -46,6 +46,10 @@ choice
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bool "RT3883 eval kit"
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depends on SOC_RT3883
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+ config DTB_MT7620A_EVAL
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+ bool "MT7620A eval kit"
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+ depends on SOC_MT7620
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+
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endchoice
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endif
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--- a/arch/mips/ralink/dts/Makefile
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+++ b/arch/mips/ralink/dts/Makefile
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@@ -1,3 +1,4 @@
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obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
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obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
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obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
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+obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
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--- /dev/null
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+++ b/arch/mips/ralink/dts/mt7620a.dtsi
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@@ -0,0 +1,58 @@
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "ralink,mtk7620a-soc";
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+
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+ cpus {
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+ cpu@0 {
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+ compatible = "mips,mips24KEc";
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+ };
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+ };
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+
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+ cpuintc: cpuintc@0 {
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ interrupt-controller;
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+ compatible = "mti,cpu-interrupt-controller";
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+ };
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+
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+ palmbus@10000000 {
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+ compatible = "palmbus";
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+ reg = <0x10000000 0x200000>;
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+ ranges = <0x0 0x10000000 0x1FFFFF>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ sysc@0 {
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+ compatible = "ralink,mt7620a-sysc";
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+ reg = <0x0 0x100>;
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+ };
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+
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+ intc: intc@200 {
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+ compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
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+ reg = <0x200 0x100>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <2>;
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+ };
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+
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+ memc@300 {
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+ compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
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+ reg = <0x300 0x100>;
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+ };
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+
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+ uartlite@c00 {
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+ compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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+ reg = <0xc00 0x100>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <12>;
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+
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+ reg-shift = <2>;
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/mips/ralink/dts/mt7620a_eval.dts
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@@ -0,0 +1,16 @@
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+/dts-v1/;
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+
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+/include/ "mt7620a.dtsi"
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+
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+/ {
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+ compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
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+ model = "Ralink MT7620A evaluation board";
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+
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+ memory@0 {
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+ reg = <0x0 0x2000000>;
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttyS0,57600";
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+ };
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+};
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