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211 lines
4.4 KiB
Diff
211 lines
4.4 KiB
Diff
From b72ae753b73cbc4b488dcdbf997faec199c8bb3f Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 21 Mar 2013 18:29:02 +0100
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Subject: [PATCH 108/121] MIPS: add rt2880 dts files
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Add a dtsi file for RT2880 SoC and a sample dts file. This SoC is first one that
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was released in this SoC family.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ralink/Kconfig | 4 ++
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arch/mips/ralink/dts/Makefile | 1 +
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arch/mips/ralink/dts/rt2880.dtsi | 116 ++++++++++++++++++++++++++++++++++
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arch/mips/ralink/dts/rt2880_eval.dts | 52 +++++++++++++++
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4 files changed, 173 insertions(+)
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create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
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create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -26,6 +26,10 @@ choice
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config DTB_RT_NONE
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bool "None"
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+ config DTB_RT2880_EVAL
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+ bool "RT2880 eval kit"
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+ depends on SOC_RT288X
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+
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config DTB_RT305X_EVAL
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bool "RT305x eval kit"
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depends on SOC_RT305X
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--- a/arch/mips/ralink/dts/Makefile
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+++ b/arch/mips/ralink/dts/Makefile
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@@ -1 +1,2 @@
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+obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
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obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
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--- /dev/null
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+++ b/arch/mips/ralink/dts/rt2880.dtsi
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@@ -0,0 +1,116 @@
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "ralink,rt2880-soc";
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+
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+ cpus {
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+ cpu@0 {
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+ compatible = "mips,mips24KEc";
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+ };
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttyS0,57600 init=/init";
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+ };
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+
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+ cpuintc: cpuintc@0 {
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ interrupt-controller;
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+ compatible = "mti,cpu-interrupt-controller";
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+ };
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+
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+ palmbus@10000000 {
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+ compatible = "palmbus";
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+ reg = <0x10000000 0x200000>;
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+ ranges = <0x0 0x10000000 0x1FFFFF>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ sysc@300000 {
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+ compatible = "ralink,rt2880-sysc";
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+ reg = <0x300000 0x100>;
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+ };
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+
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+ timer@300100 {
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+ compatible = "ralink,rt2880-timer";
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+ reg = <0x300100 0x20>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <1>;
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+
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+ status = "disabled";
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+ };
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+
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+ watchdog@300120 {
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+ compatible = "ralink,rt2880-wdt";
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+ reg = <0x300120 0x10>;
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+ };
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+
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+ intc: intc@300200 {
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+ compatible = "ralink,rt2880-intc";
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+ reg = <0x300200 0x100>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <2>;
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+ };
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+
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+ memc@300300 {
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+ compatible = "ralink,rt2880-memc";
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+ reg = <0x300300 0x100>;
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+ };
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+
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+ gpio0: gpio@300600 {
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+ compatible = "ralink,rt2880-gpio";
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+ reg = <0x300600 0x34>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <24>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 20 24 28 2c
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+ 30 34 ];
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+ };
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+
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+ gpio1: gpio@300638 {
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+ compatible = "ralink,rt2880-gpio";
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+ reg = <0x300638 0x24>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <16>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 10 14 18 1c
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+ 20 24 ];
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+ };
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+
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+ gpio2: gpio@300660 {
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+ compatible = "ralink,rt2880-gpio";
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+ reg = <0x300660 0x24>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ ralink,num-gpios = <32>;
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+ ralink,register-map = [ 00 04 08 0c
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+ 10 14 18 1c
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+ 20 24 ];
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+ };
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+
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+ uartlite@300c00 {
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+ compatible = "ralink,rt2880-uart", "ns16550a";
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+ reg = <0x300c00 0x100>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <12>;
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+
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+ reg-shift = <2>;
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/mips/ralink/dts/rt2880_eval.dts
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@@ -0,0 +1,52 @@
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+/dts-v1/;
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+
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+/include/ "rt2880.dtsi"
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
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+ model = "Ralink RT2880 evaluation board";
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+
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+ memory@8000000 {
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+ reg = <0x0 0x2000000>;
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+ };
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+
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+ palmbus@10000000 {
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+ sysc@300000 {
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+ ralink,pinmux = "uartlite", "spi";
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+ ralink,uartmux = "gpio";
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+ ralink,wdtmux = <0>;
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+ };
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+ };
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+
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+ cfi@1f000000 {
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+ compatible = "cfi-flash";
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+ reg = <0x1f000000 0x800000>;
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+
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+ bank-width = <2>;
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+ device-width = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "uboot";
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+ reg = <0x0 0x30000>;
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+ read-only;
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+ };
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+ partition@30000 {
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+ label = "uboot-env";
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+ reg = <0x30000 0x10000>;
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+ read-only;
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+ };
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+ partition@40000 {
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+ label = "calibration";
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+ reg = <0x40000 0x10000>;
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+ read-only;
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+ };
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+ partition@50000 {
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+ label = "linux";
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+ reg = <0x50000 0x7b0000>;
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+ };
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+ };
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+};
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