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35 lines
1.4 KiB
Diff
35 lines
1.4 KiB
Diff
From 6d7e10038aba81d7273f72f36db64c71ae7f8f69 Mon Sep 17 00:00:00 2001
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From: Nagesh Koneti <koneti.nagesh@nxp.com>
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Date: Wed, 25 Sep 2019 12:01:19 +0530
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Subject: [PATCH] staging: fsl_ppfe/eth: Disable termination of CRC fwd.
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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LS1012A MAC PCS block has an erratum that is seen with specific PHY AR803x.
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The issue is triggered by the (spec-compliant) operation of the AR803x PHY
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on the LS1012A-FRWY board.Due to this, good FCS packet is reported as error
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packet by MAC, so for these error packets FCS should be validated and
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discard only real error packets in PFE Rx packet path.
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Signed-off-by: Nagesh Koneti <koneti.nagesh@nxp.com>
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Signed-off-by: Nagesh Koneti <“koneti.nagesh@nxp.com”>
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---
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drivers/staging/fsl_ppfe/pfe_hal.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/drivers/staging/fsl_ppfe/pfe_hal.c
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+++ b/drivers/staging/fsl_ppfe/pfe_hal.c
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@@ -860,8 +860,9 @@ void gemac_set_mode(void *base, int mode
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/*Remove loopbank*/
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val &= ~EMAC_RCNTRL_LOOP;
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- /* Enable flow control and MII mode and terminate received CRC */
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- val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE | EMAC_RCNTRL_CRC_FWD);
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+ /* Enable flow control and MII mode.PFE firmware always expects
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+ CRC should be forwarded by MAC to validate CRC in software.*/
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+ val |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE);
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writel(val, base + EMAC_RCNTRL_REG);
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}
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