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127 lines
2.5 KiB
C
127 lines
2.5 KiB
C
/*
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* Copyright (C) 2010 Scott Nicholas <neutronscott@scottn.us>
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* Copyright (C) 2012 Florian Fainelli <florian@openwrt.org>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/pm.h>
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#include <linux/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/irq_cpu.h>
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#include <asm/irq.h>
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#include <adm8668.h>
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/* interrupt controller */
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#define IRQ_STATUS_REG 0x00 /* Read */
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#define IRQ_ENABLE_REG 0x08 /* Read/Write */
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#define IRQ_DISABLE_REG 0x0C /* Write */
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#define IRQ_MASK 0xffff
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static inline void intc_write_reg(u32 val, unsigned int reg)
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{
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void __iomem *base = (void __iomem *)KSEG1ADDR(ADM8668_INTC_BASE);
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__raw_writel(val, base + reg);
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}
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static inline u32 intc_read_reg(unsigned int reg)
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{
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void __iomem *base = (void __iomem *)KSEG1ADDR(ADM8668_INTC_BASE);
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return __raw_readl(base + reg);
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}
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static void adm8668_irq_cascade(void)
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{
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int irq;
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u32 intsrc;
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intsrc = intc_read_reg(IRQ_STATUS_REG) & IRQ_MASK;
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if (intsrc) {
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irq = fls(intsrc) - 1;
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do_IRQ(irq);
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} else
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spurious_interrupt();
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}
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/*
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* System irq dispatch
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*/
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void plat_irq_dispatch(void)
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{
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unsigned int pending;
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pending = read_c0_cause() & read_c0_status() & ST0_IM;
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/* timer interrupt, that we renumbered */
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if (pending & STATUSF_IP7)
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do_IRQ(MIPS_CPU_IRQ_BASE + 7);
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else if (pending & STATUSF_IP2)
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adm8668_irq_cascade();
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else
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spurious_interrupt();
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}
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/*
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* enable 8668 irq
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*/
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static void enable_adm8668_irq(struct irq_data *d)
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{
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intc_write_reg((1 << d->irq), IRQ_ENABLE_REG);
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}
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static void ack_adm8668_irq(struct irq_data *d)
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{
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intc_write_reg((1 << d->irq), IRQ_DISABLE_REG);
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}
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/*
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* system irq type
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*/
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static struct irq_chip adm8668_irq_type = {
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.name = "adm8668",
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.irq_ack = ack_adm8668_irq,
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.irq_mask = ack_adm8668_irq,
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.irq_unmask = enable_adm8668_irq
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};
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/*
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* irq init
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*/
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static void __init init_adm8668_irqs(void)
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{
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int i;
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/* disable all interrupts for the moment */
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intc_write_reg(IRQ_MASK, IRQ_DISABLE_REG);
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for (i = 0; i <= ADM8668_IRQ_MAX; i++)
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irq_set_chip_and_handler(i, &adm8668_irq_type,
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handle_level_irq);
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/* hw0 is where our interrupts are uh.. interrupted at. */
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set_c0_status(IE_IRQ0);
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}
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/*
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* system init
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*/
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void __init arch_init_irq(void)
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{
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mips_cpu_irq_init();
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init_adm8668_irqs();
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}
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