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143 lines
4.0 KiB
Diff
143 lines
4.0 KiB
Diff
From: Russell King <rmk+kernel@armlinux.org.uk>
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Date: Thu, 5 Jan 2017 16:32:14 +0000
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Subject: [PATCH] net: phy: allow settings table to support more than 32
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link modes
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Allow the phy settings table to support more than 32 link modes by
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switching to the ethtool link mode bit number representation, rather
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than storing the mask. This will allow phylink and other ethtool
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code to share the settings table to look up settings.
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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---
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--- a/drivers/net/phy/phy.c
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+++ b/drivers/net/phy/phy.c
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@@ -175,7 +175,7 @@ static inline int phy_aneg_done(struct p
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struct phy_setting {
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int speed;
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int duplex;
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- u32 setting;
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+ int bit;
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};
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/* A mapping of all SUPPORTED settings to speed/duplex. This table
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@@ -185,57 +185,57 @@ static const struct phy_setting settings
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{
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.speed = SPEED_10000,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_10000baseKR_Full,
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+ .bit = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
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},
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{
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.speed = SPEED_10000,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_10000baseKX4_Full,
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+ .bit = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
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},
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{
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.speed = SPEED_10000,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_10000baseT_Full,
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+ .bit = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
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},
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{
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.speed = SPEED_2500,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_2500baseX_Full,
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+ .bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
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},
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{
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.speed = SPEED_1000,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_1000baseKX_Full,
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+ .bit = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
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},
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{
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.speed = SPEED_1000,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_1000baseT_Full,
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+ .bit = ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
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},
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{
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.speed = SPEED_1000,
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.duplex = DUPLEX_HALF,
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- .setting = SUPPORTED_1000baseT_Half,
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+ .bit = ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
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},
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{
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.speed = SPEED_100,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_100baseT_Full,
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+ .bit = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
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},
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{
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.speed = SPEED_100,
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.duplex = DUPLEX_HALF,
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- .setting = SUPPORTED_100baseT_Half,
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+ .bit = ETHTOOL_LINK_MODE_100baseT_Half_BIT,
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},
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{
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.speed = SPEED_10,
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.duplex = DUPLEX_FULL,
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- .setting = SUPPORTED_10baseT_Full,
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+ .bit = ETHTOOL_LINK_MODE_10baseT_Full_BIT,
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},
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{
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.speed = SPEED_10,
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.duplex = DUPLEX_HALF,
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- .setting = SUPPORTED_10baseT_Half,
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+ .bit = ETHTOOL_LINK_MODE_10baseT_Half_BIT,
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},
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};
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@@ -243,7 +243,8 @@ static const struct phy_setting settings
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* phy_lookup_setting - lookup a PHY setting
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* @speed: speed to match
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* @duplex: duplex to match
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- * @feature: allowed link modes
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+ * @mask: allowed link modes
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+ * @maxbit: bit size of link modes
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* @exact: an exact match is required
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*
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* Search the settings array for a setting that matches the speed and
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@@ -257,13 +258,14 @@ static const struct phy_setting settings
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* they all fail, %NULL will be returned.
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*/
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static const struct phy_setting *
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-phy_lookup_setting(int speed, int duplex, u32 features, bool exact)
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+phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
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+ size_t maxbit, bool exact)
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{
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const struct phy_setting *p, *match = NULL, *last = NULL;
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int i;
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for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
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- if (p->setting & features) {
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+ if (p->bit < maxbit && test_bit(p->bit, mask)) {
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last = p;
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if (p->speed == speed && p->duplex == duplex) {
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/* Exact match for speed and duplex */
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@@ -302,7 +304,9 @@ phy_lookup_setting(int speed, int duplex
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static const struct phy_setting *
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phy_find_valid(int speed, int duplex, u32 supported)
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{
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- return phy_lookup_setting(speed, duplex, supported, false);
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+ unsigned long mask = supported;
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+
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+ return phy_lookup_setting(speed, duplex, &mask, BITS_PER_LONG, false);
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}
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/**
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@@ -316,7 +320,9 @@ phy_find_valid(int speed, int duplex, u3
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*/
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static inline bool phy_check_valid(int speed, int duplex, u32 features)
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{
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- return !!phy_lookup_setting(speed, duplex, features, true);
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+ unsigned long mask = features;
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+
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+ return !!phy_lookup_setting(speed, duplex, &mask, BITS_PER_LONG, true);
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}
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/**
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