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158 lines
4.9 KiB
Diff
158 lines
4.9 KiB
Diff
From fab6710e4c51f4eb622f95a08322ab5fdbe3f295 Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Mon, 13 Apr 2020 07:59:42 +0200
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Subject: [PATCH] staging: mt7621-pci: fix PCIe interrupt mapping
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MT7621 has three assigned interrupts for the pcie. This
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interrupts should properly being mapped taking into account
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which devices are finally connected in which bus according
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to link status. So the irq mappings should be as follows
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according to link status (three bits indicating which devices
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are link up):
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* For PCIe Bus 1 slot 0:
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- status = 0x2 || status = 0x6 => IRQ = pcie1_irq (24).
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- status = 0x4 => IRQ = pcie2_irq (25).
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- default => IRQ = pcie0_irq (23).
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* For PCIe Bus 2 slot 0:
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- status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
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- default => IRQ = pcie1_irq (24).
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* For PCIe Bus 2 slot 1:
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- status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
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- default => IRQ = pcie1_irq (24).
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* For PCIe Bus 3 any slot:
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- default => IRQ = pcie2_irq (25).
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Because of this, the function 'of_irq_parse_and_map_pci' cannot
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be used and we need to change device tree information from using
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the 'interrupt-map' and 'interrupt-map-mask' properties into an
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'interrupts' property to be able to get irq information from the
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ports using the 'platform_get_irq' and storing an 'irq-map' into
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the pcie driver data node to properly map correct irq using a
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new 'mt7621_map_irq' function where this map will be read and the
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correct irq returned.
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Fixes: 46d093124df4 ("staging: mt7621-pci: improve interrupt mapping")
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Link: https://lore.kernel.org/r/20200413055942.2714-1-sergio.paracuellos@gmail.com
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/staging/mt7621-dts/mt7621.dtsi | 9 +++----
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drivers/staging/mt7621-pci/pci-mt7621.c | 36 +++++++++++++++++++++++--
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2 files changed, 38 insertions(+), 7 deletions(-)
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--- a/drivers/staging/mt7621-pci/pci-mt7621.c
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+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
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@@ -97,6 +97,7 @@
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* @pcie_rst: pointer to port reset control
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* @gpio_rst: gpio reset
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* @slot: port slot
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+ * @irq: GIC irq
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* @enabled: indicates if port is enabled
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*/
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struct mt7621_pcie_port {
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@@ -107,6 +108,7 @@ struct mt7621_pcie_port {
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struct reset_control *pcie_rst;
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struct gpio_desc *gpio_rst;
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u32 slot;
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+ int irq;
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bool enabled;
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};
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@@ -120,6 +122,7 @@ struct mt7621_pcie_port {
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* @dev: Pointer to PCIe device
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* @io_map_base: virtual memory base address for io
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* @ports: pointer to PCIe port information
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+ * @irq_map: irq mapping info according pcie link status
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* @resets_inverted: depends on chip revision
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* reset lines are inverted.
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*/
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@@ -135,6 +138,7 @@ struct mt7621_pcie {
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} offset;
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unsigned long io_map_base;
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struct list_head ports;
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+ int irq_map[PCIE_P2P_MAX];
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bool resets_inverted;
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};
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@@ -279,6 +283,16 @@ static void setup_cm_memory_region(struc
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}
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}
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+static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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+{
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+ struct mt7621_pcie *pcie = pdev->bus->sysdata;
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+ struct device *dev = pcie->dev;
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+ int irq = pcie->irq_map[slot];
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+
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+ dev_info(dev, "bus=%d slot=%d irq=%d\n", pdev->bus->number, slot, irq);
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+ return irq;
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+}
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+
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static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie)
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{
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struct device *dev = pcie->dev;
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@@ -330,6 +344,7 @@ static int mt7621_pcie_parse_port(struct
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{
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struct mt7621_pcie_port *port;
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struct device *dev = pcie->dev;
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+ struct platform_device *pdev = to_platform_device(dev);
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struct device_node *pnode = dev->of_node;
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struct resource regs;
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char name[10];
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@@ -371,6 +386,12 @@ static int mt7621_pcie_parse_port(struct
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port->slot = slot;
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port->pcie = pcie;
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+ port->irq = platform_get_irq(pdev, slot);
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+ if (port->irq < 0) {
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+ dev_err(dev, "Failed to get IRQ for PCIe%d\n", slot);
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+ return -ENXIO;
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+ }
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+
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INIT_LIST_HEAD(&port->list);
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list_add_tail(&port->list, &pcie->ports);
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@@ -585,13 +606,15 @@ static int mt7621_pcie_init_virtual_brid
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{
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u32 pcie_link_status = 0;
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u32 n;
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- int i;
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+ int i = 0;
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u32 p2p_br_devnum[PCIE_P2P_MAX];
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+ int irqs[PCIE_P2P_MAX];
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struct mt7621_pcie_port *port;
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list_for_each_entry(port, &pcie->ports, list) {
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u32 slot = port->slot;
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+ irqs[i++] = port->irq;
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if (port->enabled)
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pcie_link_status |= BIT(slot);
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}
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@@ -614,6 +637,15 @@ static int mt7621_pcie_init_virtual_brid
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(p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) |
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(p2p_br_devnum[2] << PCIE_P2P_BR_DEVNUM2_SHIFT));
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+ /* Assign IRQs */
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+ n = 0;
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+ for (i = 0; i < PCIE_P2P_MAX; i++)
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+ if (pcie_link_status & BIT(i))
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+ pcie->irq_map[n++] = irqs[i];
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+
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+ for (i = n; i < PCIE_P2P_MAX; i++)
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+ pcie->irq_map[i] = -1;
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+
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return 0;
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}
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@@ -638,7 +670,7 @@ static int mt7621_pcie_register_host(str
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host->busnr = pcie->busn.start;
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host->dev.parent = pcie->dev;
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host->ops = &mt7621_pci_ops;
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- host->map_irq = of_irq_parse_and_map_pci;
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+ host->map_irq = mt7621_map_irq;
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host->swizzle_irq = pci_common_swizzle;
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host->sysdata = pcie;
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