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82 lines
2.0 KiB
Diff
82 lines
2.0 KiB
Diff
From a8ad7637cec0c2c2b1322d78b142beea4621dd23 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Tue, 26 May 2015 17:18:26 +0200
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Subject: [PATCH] ARM: dts: sun5i: Add NAND controller pin definitions
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Define the NAND controller pin configs.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun5i-a10s.dtsi | 14 ++++++++++++++
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arch/arm/boot/dts/sun5i.dtsi | 38 ++++++++++++++++++++++++++++++++++++++
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2 files changed, 52 insertions(+)
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--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
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@@ -656,4 +656,18 @@
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clocks = <&ahb_gates 28>;
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};
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};
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+
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+ nand_cs2_pins_a: nand_cs@2 {
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+ allwinner,pins = "PC17";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs3_pins_a: nand_cs@3 {
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+ allwinner,pins = "PC18";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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};
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--- a/arch/arm/boot/dts/sun5i-a13.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
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@@ -528,6 +528,44 @@
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allwinner,drive = <SUN4I_PINCTRL_30_MA>;
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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};
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+
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+ nand_pins_a: nand_base0@0 {
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+ allwinner,pins = "PC0", "PC1", "PC2",
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+ "PC5", "PC8", "PC9", "PC10",
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+ "PC11", "PC12", "PC13", "PC14",
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+ "PC15";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs0_pins_a: nand_cs@0 {
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+ allwinner,pins = "PC4";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs1_pins_a: nand_cs@1 {
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+ allwinner,pins = "PC3";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_rb0_pins_a: nand_rb@0 {
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+ allwinner,pins = "PC6";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_rb1_pins_a: nand_rb@1 {
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+ allwinner,pins = "PC7";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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};
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timer@01c20c00 {
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